Reorganized such that build dependencies wont fail
Also some LPDDR4 starting was conducted
This commit is contained in:
8
.gitmodules
vendored
8
.gitmodules
vendored
@@ -1,7 +1,7 @@
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[submodule "DRAMSys/simulator/src/common/third_party/tinyxml2"]
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path = DRAMSys/simulator/src/common/third_party/tinyxml2
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[submodule "DRAMSys/library/src/common/third_party/tinyxml2"]
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path = DRAMSys/library/src/common/third_party/tinyxml2
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url = https://github.com/leethomason/tinyxml2.git
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[submodule "DRAMSys/simulator/src/common/third_party/DRAMPower"]
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path = DRAMSys/simulator/src/common/third_party/DRAMPower
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[submodule "DRAMSys/library/src/common/third_party/DRAMPower"]
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path = DRAMSys/library/src/common/third_party/DRAMPower
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url = https://github.com/tukl-msd/DRAMPower.git
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branch = master
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@@ -11,10 +11,13 @@ $$eval(thermalsim) {
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message(Thermal Simulation Feature Disabled)
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}
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SUBDIRS += simulator/library.pro
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SUBDIRS += simulator/simulator.pro
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SUBDIRS += analyzer/traceAnalyzer.pro
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SUBDIRS += library
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SUBDIRS += simulator
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SUBDIRS += traceAnalyzer
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library.subdir = library
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simulator.subdir = simulator
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traceAnalyzer.subdir = traceAnalyzer
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# Check if gem5 is installed:
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gem5 = $$(GEM5)
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@@ -25,11 +28,13 @@ isEmpty(gem5) {
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message(Gem5 Simulation Feature Enabled)
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message(Gem5 home is $${gem5})
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DEFINES += DRAMSYS_GEM5
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SUBDIRS += gem5/gem5.pro
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SUBDIRS += gem5
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gem5.subdir = gem5
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gem5.depends = library simulator
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}
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# Build Sub Projects in the order given above
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CONFIG += ordered
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# Define Build Order
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simulator.depends = library
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# Additional Files:
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# tests folder (DRAMSys/tests)
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@@ -41,10 +41,10 @@ macx: {
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QMAKE_CXXFLAGS += -std=c++0x -stdlib=libc++ -O0 -g
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}
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INCLUDEPATH += ../simulator/src/simulation/
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INCLUDEPATH += ../library/src/simulation/
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INCLUDEPATH += $${systemc_home}/include
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INCLUDEPATH += ../simulator/src/common/third_party/DRAMPower/src
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INCLUDEPATH += ../simulator/src/common/third_party/DRAMPower/src/libdrampower
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INCLUDEPATH += ../library/src/common/third_party/DRAMPower/src
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INCLUDEPATH += ../library/src/common/third_party/DRAMPower/src/libdrampower
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INCLUDEPATH += $${gem5_root}/build/$${gem5_arch}/
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INCLUDEPATH += $${gem5_root}/util/tlm/examples/slave_port
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INCLUDEPATH += $${gem5_root}/util/tlm/examples/common
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@@ -52,8 +52,8 @@ INCLUDEPATH += $${gem5_root}/util/tlm/src/
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INCLUDEPATH += $${gem5_root}/util/systemc
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LIBS += -L$${systemc_home}/lib-$${systemc_target_arch} -lsystemc
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LIBS += ../simulator/libDRAMSys.a
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LIBS += ../../DRAMSys/simulator/src/common/third_party/DRAMPower/src/libdrampower.a
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LIBS += ../library/libDRAMSys.a
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LIBS += ../../DRAMSys/library/src/common/third_party/DRAMPower/src/libdrampower.a
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LIBS += -lsqlite3
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LIBS += -L$${gem5_root}/build/$${gem5_arch} -lgem5_$${gem5_variant}
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@@ -136,7 +136,7 @@ int sc_main(int argc, char **argv)
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{
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// Get path of resources:
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resources = pathOfFile(argv[0])
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+ string("/../../DRAMSys/simulator/resources/");
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+ string("/../../DRAMSys/library/resources/");
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SimulationXML = argv[1];
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gem5ConfigFile = argv[2];
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@@ -6,7 +6,7 @@ CONFIG += console
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CONFIG -= app_bundle
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CONFIG -= qt
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system(cd ../../DRAMSys/simulator/src/common/third_party/DRAMPower; make src/libdrampower.a;)
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system(cd ../../DRAMSys/library/src/common/third_party/DRAMPower; make src/libdrampower.a;)
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systemc_home = $$(SYSTEMC_HOME)
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isEmpty(systemc_home) {
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@@ -230,6 +230,5 @@ $$eval(thermalsim) {
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}
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# Additional Files:
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# resources folder (DRAMSys/simulator/resources)
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include(resources/resources.pri)
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@@ -9,7 +9,7 @@
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<PowerDownTimeout value="100" />
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<!-- Error Modelling -->
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<ErrorChipSeed value="42" />
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<ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
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<ErrorCSVFile value="../../DRAMSys/library/src/error/error.csv" />
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<!-- Modes: NoStorage, Store (store data without errormodel), ErrorModel (store data with errormodel) -->
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<StoreMode value="NoStorage" />
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<ControllerCoreDisableRefresh value="0"/>
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@@ -12,7 +12,7 @@
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<CheckTLM2Protocol value = "0" />
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<ECCControllerMode value = "Disabled" />
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<ErrorChipSeed value="42" />
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<ErrorCSVFile value="../../DRAMSys/simulator/resources/error/wideio.csv" />
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<ErrorCSVFile value="../../DRAMSys/library/resources/error/wideio.csv" />
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<!-- Modes:
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- NoStorage,
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- Store (store data without errormodel),
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@@ -12,7 +12,7 @@
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<CheckTLM2Protocol value = "0" />
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<ECCControllerMode value = "Hamming" />
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<ErrorChipSeed value="42" />
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<ErrorCSVFile value="../../DRAMSys/simulator/resources/error/wideio.csv" />
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<ErrorCSVFile value="../../DRAMSys/library/resources/error/wideio.csv" />
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<!-- Modes:
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- NoStorage,
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- Store (store data without errormodel),
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@@ -12,7 +12,7 @@
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<CheckTLM2Protocol value = "0" />
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<ECCControllerMode value = "Disabled" />
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<ErrorChipSeed value="42" />
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<ErrorCSVFile value="../../DRAMSys/simulator/resources/error/wideio.csv" />
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<ErrorCSVFile value="../../DRAMSys/library/resources/error/wideio.csv" />
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<!-- Modes:
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- NoStorage,
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- Store (store data without errormodel),
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@@ -1,5 +1,5 @@
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# Relative paths to "DRAMSys/simulator" because this file is included in
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# "DRAMSys/simulator/simulator.pro"
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# Relative paths to "DRAMSys/library" because this file is included in
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# "DRAMSys/library/simulator.pro"
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# Simulation Files
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OTHER_FILES += resources/simulations/ddr3-example.xml
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@@ -31,7 +31,6 @@ OTHER_FILES += resources/scripts/DRAMSylva/LICENSE
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OTHER_FILES += resources/scripts/DRAMSylva/README
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OTHER_FILES += resources/scripts/DRAMSylva/DRAMSylva.patch
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OTHER_FILES += resources/scripts/DRAMSylva/DRAMSylva.sh
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OTHER_FILES += resources/scripts/DRAMSylva/DRAMSylvaCSVPlot.py
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# Trace Files
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OTHER_FILES += resources/traces/chstone-aes_32.stl
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@@ -78,6 +77,7 @@ OTHER_FILES += resources/traces/sms_t4.stl
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OTHER_FILES += resources/traces/ddr3_postpone_ref_test_1.stl
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OTHER_FILES += resources/traces/ddr3_postpone_ref_test_2.stl
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OTHER_FILES += resources/traces/ddr3_postpone_ref_test_3.stl
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OTHER_FILES += resources/traces/ip*.stl
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# Memory Controller Configs
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OTHER_FILES += resources/configs/mcconfigs/fifoStrict.xml
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@@ -157,6 +157,10 @@ OTHER_FILES += resources/configs/thermalsim/powerInfo.xml
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OTHER_FILES += resources/configs/thermalsim/stack.stk
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OTHER_FILES += resources/configs/thermalsim/config.xml
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# Add DRAMPower
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OTHER_FILES += src/common/third_party/DRAMPower/*
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OTHER_FILES += src/common/third_party/DRAMPower/src/*
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# Error Simulation data
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OTHER_FILES += resources/error/wideio.csv
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@@ -164,3 +168,7 @@ DISTFILES += \
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$$PWD/traces/read_write_switch.stl \
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$$PWD/configs/mcconfigs/fr_fcfs_rp.xml \
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$$PWD/configs/mcconfigs/fr_fcfs_grp.xml \
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$$PWD/configs/simulator/lpddr4.xml \
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$$PWD/simulations/lpddr4-single-device.xml \
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$$PWD/configs/amconfigs/am_lpddr4.xml \
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$$PWD/configs/memspecs/MICRON_6Gb_LPDDR4-3200_NDA_NDA_NDA.xml
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