Commit Graph

2617 Commits

Author SHA1 Message Date
Iron Prando da Silva
749c6300c5 Organizing files. 2022-02-02 11:51:10 +01:00
Iron Prando da Silva
7c1392ebd9 Started refactoring for dependency calculation skipping. 2022-02-02 10:36:37 +01:00
Lukas Steiner
98962159ef Merge branch 'work/metric_fix' into 'develop'
Fix metric delayed_reasons malformed output

See merge request ems/astdm/modeling.dram/dram.sys!338
2022-02-01 09:34:02 +00:00
Lukas Steiner
378a5d9608 Set Qt5_DIR only on apple. 2022-02-01 10:10:18 +01:00
Matthias Jung
d981b8a331 Added some lines for macOS support
brew install qt@5 qwt-qt5
2022-02-01 00:50:27 +01:00
b4259fc886 Fix metric delayed_reasons malformed output 2022-01-31 10:51:47 +01:00
Iron Prando da Silva
bae6738768 Added using namespace std to dependency source file. 2022-01-24 10:41:34 +01:00
Iron Prando da Silva
e88d2e100d Removed unused variables. 2022-01-20 11:59:11 +01:00
Iron Prando da Silva
c4de59da95 Added auxiliar class for multiple activate window pool capturing. 2022-01-19 14:03:11 +01:00
Iron Prando da Silva
be150e03f2 Renamed variable clk to tCk. 2022-01-17 14:00:35 +01:00
Lukas Steiner
3324485fe9 Merge branch 'work/formatting' into 'develop'
Don't use scientific notation when formatting tracetime

See merge request ems/astdm/modeling.dram/dram.sys!337
2022-01-13 14:55:47 +00:00
Iron Prando da Silva
7fdc4c1fd4 Corrected rainbow transaction color selection indicator. 2022-01-13 13:45:32 +01:00
3cc700adc4 Don't use scientific notation when formatting tracetime 2022-01-13 10:41:21 +01:00
Iron Prando da Silva
81916dca02 Added InterRank variable for skip checking when phases are within the same rank. 2022-01-11 11:36:48 +01:00
Lukas Steiner
171fc19e7e Correct error in timing configuration. 2022-01-11 07:57:43 +00:00
Iron Prando da Silva
273fb4aa30 Corrected 'unable to fetch row' exception after removing dependencies database, reopening file and calculating new dependencies. 2022-01-10 12:43:39 +01:00
Iron Prando da Silva
319f88316c Added copyright message to files. 2022-01-10 11:39:11 +01:00
Lukas Steiner
9bb28525ee Merge branch 'LPDDR4_devices' into 'develop'
Add device parameter to non-DIMM standards

See merge request ems/astdm/modeling.dram/dram.sys!336
2022-01-10 09:17:17 +00:00
Lukas Steiner
45b13fcf6c Change devices in test files. 2022-01-10 09:40:46 +01:00
Lukas Steiner
54b67ac653 Add number of devices to all standards and memspec files, add GB/s output. 2022-01-07 11:50:14 +01:00
Iron Prando da Silva
0128748419 Changed command bus dependencies to Inter-Rank. 2021-12-16 13:59:12 +01:00
Iron Prando da Silva
913cf4879c Finishing rebase. 2021-12-15 12:34:18 +01:00
Iron Prando da Silva
70c65b6c47 Corrected dependency calculation algorithm. All good. 2021-12-15 12:31:11 +01:00
Iron Prando da Silva
54393fe0ca Added INT types to ID columns in DirectDependencies table creation. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
860d074255 Closing database before removal. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
5ffd10744f Added interface for dependency calculation. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
b3df8d237c Added dependency calculations. Still missing tests and interface. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
95d4014d2d Added main calculation loop and other modifications and corrections. Still missing table data storing and test. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
da46440f2f Added DDR3 time dependencies code manually. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
527f7fb492 Started adding manual code for DDR3 time dependencies. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
199df97683 Added stl map QString comparator. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
98afd98563 Finished interface class for auto-generated time dependencies code. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
e04fae1ab5 Began adding time dependencies interface for to be generated code. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
910fc01962 Began adding base algorithm for dependency calculations. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
8fbe3a6fb4 Renamed 'Alpha Colored' to 'Rainbow Colored'. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
176aedf72b Minor correction to alpha distribution equation. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
fe2d9dcfcb Testing new color configuration -- Refactored ColorGenerator and added HSV15. 2021-12-15 11:36:30 +01:00
Iron Prando da Silva
6f14e6e23f Added INT types to ID columns in DirectDependencies table creation. 2021-12-15 11:33:05 +01:00
Lukas Steiner
eba6d4fd43 Merge branch 'new_commands' into 'develop'
Merge LPDDR5 into develop (corrected)

See merge request ems/astdm/modeling.dram/dram.sys!334
2021-12-14 08:02:29 +00:00
Iron Prando da Silva
4e7b5995cd Closing database before removal. 2021-12-13 16:42:47 +01:00
Iron Prando da Silva
7bfb128132 Added interface for dependency calculation. 2021-12-13 16:30:45 +01:00
Lukas Steiner
c708be375f Add LPDDR5 simulation files. 2021-12-13 15:19:48 +01:00
Iron Prando da Silva
0e1245ad98 Added dependency calculations. Still missing tests and interface. 2021-12-13 13:31:15 +01:00
Lukas Steiner
0e3ac61979 Add LP5 source files. 2021-12-13 11:38:08 +01:00
Iron Prando da Silva
8bf98ac051 Added main calculation loop and other modifications and corrections. Still missing table data storing and test. 2021-12-10 15:14:39 +01:00
Iron Prando da Silva
866d1f4765 Added DDR3 time dependencies code manually. 2021-12-10 11:07:21 +01:00
Iron Prando da Silva
5c71da1afe Started adding manual code for DDR3 time dependencies. 2021-12-09 15:50:26 +01:00
Iron Prando da Silva
f6b84b19b9 Added stl map QString comparator. 2021-12-09 13:29:06 +01:00
Iron Prando da Silva
71e98adbda Finished interface class for auto-generated time dependencies code. 2021-12-09 12:43:19 +01:00
Iron Prando da Silva
4219d1832d Began adding time dependencies interface for to be generated code. 2021-12-08 16:56:52 +01:00