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Change devices in test files.

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This commit is contained in:
Lukas Steiner
2022-01-10 09:40:46 +01:00
parent 54b67ac653
commit 45b13fcf6c
16 changed files with 18 additions and 8 deletions
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2
DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp
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@@ -109,7 +109,7 @@ MemSpecDDR3::MemSpecDDR3(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices on DIMM: " << numberOfDevices << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

2
DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp
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@@ -128,7 +128,7 @@ MemSpecDDR4::MemSpecDDR4(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices on DIMM: " << numberOfDevices << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

2
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp
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@@ -177,7 +177,7 @@ MemSpecDDR5::MemSpecDDR5(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices on DIMM: " << numberOfDevices << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp
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@@ -107,6 +107,7 @@ MemSpecGDDR5::MemSpecGDDR5(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp
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@@ -106,6 +106,7 @@ MemSpecGDDR5X::MemSpecGDDR5X(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp
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@@ -110,6 +110,7 @@ MemSpecGDDR6::MemSpecGDDR6(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp
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@@ -104,6 +104,7 @@ MemSpecHBM2::MemSpecHBM2(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp
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@@ -113,6 +113,7 @@ MemSpecLPDDR4::MemSpecLPDDR4(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecLPDDR5.cpp
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@@ -119,6 +119,7 @@ MemSpecLPDDR5::MemSpecLPDDR5(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

2
DRAMSys/library/src/configuration/memspec/MemSpecSTTMRAM.cpp
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@@ -94,7 +94,7 @@ MemSpecSTTMRAM::MemSpecSTTMRAM(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices on DIMM: " << numberOfDevices << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp
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@@ -115,6 +115,7 @@ MemSpecWideIO::MemSpecWideIO(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

1
DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp
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@@ -97,6 +97,7 @@ MemSpecWideIO2::MemSpecWideIO2(json &memspec)
std::cout << " Device width in bits: " << bitWidth << std::endl;
std::cout << " Device size in bits: " << deviceSizeBits << std::endl;
std::cout << " Device size in bytes: " << deviceSizeBytes << std::endl;
std::cout << " Devices per rank: " << numberOfDevices << std::endl;
std::cout << std::endl;
}

2
DRAMSys/tests/DDR3/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json
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@@ -9,7 +9,7 @@
"nbrOfChannels": 1,
"nbrOfRows": 16384,
"width": 64,
"nbrOfDevicesOnDIMM": 1
"nbrOfDevices": 1
},
"memoryId": "MICRON_2GB_DDR3-1066_64bit_D_SODIMM",
"memoryType": "DDR3",

4
DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
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@@ -10,7 +10,7 @@
"nbrOfChannels": 1,
"nbrOfRows": 32768,
"width": 8,
"nbrOfDevicesOnDIMM": 8
"nbrOfDevices": 8
},
"memoryId": "MICRON_4Gb_DDR4-1866_8bit_A",
"memoryType": "DDR4",
@@ -68,4 +68,4 @@
"clkMhz": 933
}
}
}
}

1
DRAMSys/tests/HBM2/configs/memspecs/HBM2.json
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@@ -8,6 +8,7 @@
"nbrOfColumns": 128,
"nbrOfRanks": 1,
"nbrOfChannels": 2,
"nbrOfDevices": 1,
"nbrOfRows": 32768,
"width": 128
},

3
DRAMSys/tests/LPDDR4/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json
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@@ -7,6 +7,7 @@
"nbrOfColumns": 1024,
"nbrOfRanks": 1,
"nbrOfChannels": 1,
"nbrOfDevices": 1,
"nbrOfRows": 65536,
"width": 16
},
@@ -47,4 +48,4 @@
"clkMhz": 1600
}
}
}
}