Commit Graph

11 Commits

Author SHA1 Message Date
12bfba1fb3 Fix various bugs
- Fix data race for some tests by disabling database recording
- Fix undefined behaviour in configuration test
- Port clkMhz to tCK for simulation script
- Port memUtil Python script to tCK with backwards compatibility
2024-02-26 09:58:19 +01:00
Lukas Steiner
5b4ed9559d Merge branch 'config_refactor' into 'develop'
Configuration Refactoring

See merge request ems/astdm/modeling.dram/dram.sys.5!63
2024-02-23 14:29:06 +00:00
0ec6ea79ad Migrate from clkMhz to tCK entry in memspecs 2024-02-23 12:04:22 +01:00
59cf73fe9c Clean up public API (DRAMSys.h)
Remove DRAMSysRecordable.h/cpp as the functionality has been incorporated into
DRAMSys.h/cpp. The databaseRecording config is now completely handled by
DRAMSys itself without needing the user of the library to instanciate DRAMSys
or DRAMSysRecordable depending on this config.
2024-02-23 11:54:51 +01:00
5391b4351d Fix configuration tests 2024-02-23 11:54:51 +01:00
Lukas Steiner
8224e97abe Reformat all files. 2023-09-21 16:50:59 +02:00
Lukas Steiner
b3955d6d02 Update TUK to RPTU. 2023-05-25 15:15:52 +02:00
69cd04c448 Namespace the complete DRAMSys library 2023-05-17 11:42:00 +02:00
a49afa40eb Use key "addressmapping" instead of "CONGEN" in addressmapping configs 2023-04-13 11:21:36 +02:00
53d913c5f1 Make BlockingRead/WriteDelay configurable 2023-03-17 09:45:11 +01:00
ac9351c025 Implement b_transport and add tests for it 2023-03-06 14:10:56 +01:00