e691d46a55
Merge branch 'fix/tCCDR_HBM2' into 'develop'
...
Implement tCCDR for HBM2 and fix bug with SID
See merge request ems/astdm/modeling.dram/dram.sys.5!102
2025-02-21 14:08:16 +00:00
6861576550
Implement tCCDR for HBM2 and fix bug with SID
2025-02-21 14:18:30 +01:00
5ab5a70d65
Merge branch 'fix/cxx_std' into 'develop'
...
Fix SystemC C++ std
See merge request ems/astdm/modeling.dram/dram.sys.5!101
2025-02-13 10:41:30 +00:00
2b52bff6c6
Fix SystemC C++ std
2025-02-13 11:37:51 +01:00
4a2c1b28b5
Merge branch 'fix/cxx_std' into 'develop'
...
When project is top-level, force C++17
See merge request ems/astdm/modeling.dram/dram.sys.5!100
2025-02-13 10:33:08 +00:00
b9fc47d1fe
When project is top-level, force C++17
2025-02-13 11:14:55 +01:00
Lukas Steiner
f223e6c500
Merge branch 'feat/hbm3_sid' into 'develop'
...
Feat/hbm3 sid
See merge request ems/astdm/modeling.dram/dram.sys.5!96
2025-01-28 09:04:16 +00:00
Lukas Steiner
35fa3b18c9
Merge branch 'feat/thinkdelay' into 'develop'
...
Use think delay as miminum END_REQ delay
See merge request ems/astdm/modeling.dram/dram.sys.5!98
2025-01-28 09:02:13 +00:00
e57ce9cc86
Use controller clock as interface clock in initiators
2025-01-24 15:55:40 +01:00
581794b970
Allow responses to be sent back-to-back
2025-01-24 14:58:06 +01:00
ba94d9fd84
Have a one cycle END_RESP delay in the standard initiator
2025-01-24 14:43:06 +01:00
1225f6b044
Fix tests after ThinkDelayFw
2025-01-24 14:19:53 +01:00
0a478dbdc5
Issue a warning if ThinkDelayFw is 0
2025-01-24 14:18:40 +01:00
007c55e878
Use think delay as miminum END_REQ delay
...
When the controller accepts requests in the same clock cycle as it
handles them, undeterministic simulations can occur as the outcome
depends on if the new request is accepted before the controllerMethod
is called or not.
Therefore, a minimum delay of one clock cylce should be used to always
handle request only in the next clock cycle, removing the disambiguity.
2025-01-24 14:18:39 +01:00
Lukas Steiner
1b50709591
Merge branch 'feat/new_checkers' into 'develop'
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Use new timing checkers
See merge request ems/astdm/modeling.dram/dram.sys.5!95
2025-01-17 14:23:24 +00:00
a68a0c9ded
Restore brc HBM3 mapping
2025-01-16 15:39:04 +01:00
e5ca7f1229
Merge branch 'fix/generator_parameters' into 'develop'
...
Fix the verification of generator parameters
See merge request ems/astdm/modeling.dram/dram.sys.5!97
2025-01-14 13:59:41 +00:00
d71e649447
Fix the verification of generator parameters
...
Also, clamp the read write ratio instead of generating an error
2025-01-14 14:55:11 +01:00
7a8633d36e
Implement stack ID for HBM3
2025-01-13 15:36:05 +01:00
a82efdbb3a
Fix HBM3 regression test
2025-01-13 10:24:09 +01:00
ed709b82d4
Integrate new Timing Checker
2025-01-13 10:24:08 +01:00
aba5ba6e2e
Switch to Open page policy for HBM3 regression test
2025-01-10 16:42:42 +01:00
ce15ce9e6e
Merge branch 'cmake_refactoring' into 'develop'
...
CMake refactor
See merge request ems/astdm/modeling.dram/dram.sys.5!85
2025-01-10 14:46:04 +00:00
marcomoerz
5b52015c75
changed namespace
...
DRAMSys::DRAMPower to DRAMPower::DRAMPower
2025-01-10 14:08:50 +01:00
marcomoerz
185317db3b
changed DRAMPower git tag
2025-01-09 10:47:48 +01:00
83cc41e318
Minor refactorings of CMakeList files
2025-01-09 08:12:49 +00:00
6d6c8c595f
Clean up private/public linking
2024-12-20 17:40:16 +01:00
ffc94a73cb
Update dependency versions
2024-12-20 17:40:15 +01:00
e2342350d0
Minor improvements on package handling
2024-12-20 17:40:15 +01:00
c3eb5e6a62
Hide the use of FetchContent behind a flag
...
FetchContent is now disabled by default, when the project is included as
an subproject by another top-level project.
Also, every usage of FetchContent is behind a separate flag to enable and
disable the usage with granular control.
2024-12-20 17:40:15 +01:00
ca9ef16d0d
Remove unnecessary project() calls
...
project() should only be called if the subdirectory, in fact, can be
built standalone.
2024-12-20 17:40:15 +01:00
e1b8bbf12d
Clean up and refactor CMakeLists
2024-12-20 17:40:15 +01:00
91a09ad771
Use FindQwt.cmake script
2024-12-20 17:40:15 +01:00
ac69d25003
Fix CMake deprecation warning
2024-12-20 17:40:15 +01:00
a37171c6fd
Remove file globs from CMakeLists
...
Fix build
2024-12-20 17:40:15 +01:00
Lukas Steiner
5825eb8c58
Merge branch 'feat/simulation_time' into 'develop'
...
Introduce SimulationTime config
Closes #62
See merge request ems/astdm/modeling.dram/dram.sys.5!91
2024-12-17 14:52:22 +00:00
Lukas Steiner
123574ab6d
Update README.md
2024-12-17 14:48:14 +00:00
b238751844
Merge branch 'fixes/simulation_script' into 'develop'
...
Fix some tests and refactor simulation script
See merge request ems/astdm/modeling.dram/dram.sys.5!92
2024-12-11 12:27:01 +00:00
ecf9127faa
Fix some tests and refactor simulation script
2024-12-11 12:56:56 +01:00
69c92f6e73
Fix benches
2024-12-10 10:26:19 +01:00
703ee81d7e
Introduce SimulationTime config
...
Use SimulationTime to forcefully stop simulation at a specified point in
time.
2024-12-10 10:04:59 +01:00
Lukas Steiner
be1807e9b0
Merge branch 'fix/buffer_entries' into 'develop'
...
Fix/buffer entries
Closes #64
See merge request ems/astdm/modeling.dram/dram.sys.5!86
2024-11-29 10:34:09 +00:00
Lukas Steiner
01caf7875e
Merge branch 'fix/bandwidth' into 'develop'
...
Fix for bandwidth calculations with pseudo-channels
See merge request ems/astdm/modeling.dram/dram.sys.5!87
2024-11-29 08:48:37 +00:00
e777b7e196
Merge branch 'fix/ta_performance' into 'develop'
...
Improve TA performance by increasing window of loaded transactions
See merge request ems/astdm/modeling.dram/dram.sys.5!88
2024-11-18 13:17:16 +00:00
8953d1054d
Merge branch '38-bespiel-fur-alle-config-jsons-in-einem-file' into 'develop'
...
Resolve "Bespiel für alle Config JSONs in einem File"
Closes #38
See merge request ems/astdm/modeling.dram/dram.sys.5!89
2024-11-18 13:10:16 +00:00
007b273760
Add a DDR4 json example that defines everything in one single JSON
2024-11-18 14:05:52 +01:00
f960f499c6
Improve TA performance by increasing window of loaded transactions
2024-11-18 13:48:06 +01:00
e409bab47a
Implement pseudo-channel and rank specific BW information
2024-11-18 13:18:33 +01:00
e74a617273
Crude fix for bandwidth calculations with pseudo-channels
2024-11-15 15:57:37 +01:00
18c00fc363
Pass a number of required buffer entries to hasBufferSpace()
2024-11-15 14:17:03 +01:00
