New test: run with base config and compare output.

This commit is contained in:
Éder F. Zulian
2016-11-14 01:40:15 +01:00
parent 3d09195010
commit bc73bb70df
3 changed files with 41 additions and 14 deletions

View File

@@ -57,7 +57,7 @@ simdir = builddir + '/simulator'
mcConfigPath = rootdir + '/DRAMSys/simulator/resources/configs/mcconfigs'
memSpecsPath = rootdir + '/DRAMSys/simulator/resources/configs/memspecs'
baseConfig = workingdir + '/baseconfig.xml'
baseConfigPath = workingdir + '/baseconfig.xml'
def build_project():
@@ -72,7 +72,6 @@ def build_project():
return ret
@unittest.skip("skipping this")
class TestBuild(unittest.TestCase):
def test_build_project(self):
""" The project's build process should succeed """
@@ -82,8 +81,7 @@ class TestBuild(unittest.TestCase):
shutil.rmtree(builddir)
@unittest.skip("skipping this")
class TestOutput(unittest.TestCase):
class TestRun(unittest.TestCase):
def setUp(self):
build_project()
@@ -92,27 +90,51 @@ class TestOutput(unittest.TestCase):
os.chdir(simdir)
self.assertEqual(subprocess.call(['./dramSys'], stdout=out), 0)
def test_run_with_base_config(self):
""" running dramSys with base config file output match reference """
os.chdir(simdir)
self.assertEqual(subprocess.call(['./dramSys', baseConfig],
stdout=out), 0)
def tearDown(self):
shutil.rmtree(builddir)
class TestOutput(unittest.TestCase):
def setUp(self):
self.tfd, self.tfpath = tempfile.mkstemp()
self.outrefpath = workingdir + '/baseconfig_expected.out'
build_project()
def filter_output(self, fname):
with open(fname, 'r') as f:
lines = f.readlines()
f.close()
return [x for x in lines if x.startswith('sim.dram')]
def test_run_with_base_config(self):
""" running dramSys with base config, output match reference """
os.chdir(simdir)
with open(self.tfpath, 'w') as f:
self.assertEqual(subprocess.call(['./dramSys', baseConfigPath],
stdout=f), 0)
f.close()
tout = self.filter_output(self.tfpath)
tref = self.filter_output(self.outrefpath)
self.assertListEqual(tout, tref)
def tearDown(self):
shutil.rmtree(builddir)
os.unlink(self.tfpath)
# This is an example that shows how to skip a test.
# @unittest.skip("skipping this")
@unittest.skip("skipping this")
class TestDummy(unittest.TestCase):
def setUp(self):
os.chdir(workingdir)
def test_list_files(self):
print('Current working directory is {0}'.format(os.getcwd()))
""" Test that lists some configuration files with XML extension """
print('\nPath is: {}\n'.format(mcConfigPath))
for file in os.listdir(mcConfigPath):
if file.endswith(".xml"):
print(file)
print('\nPath is: {}\n'.format(memSpecsPath))
for file in os.listdir(memSpecsPath):
if file.endswith(".xml"):
print(file)
@@ -124,5 +146,4 @@ if __name__ == '__main__':
errout = devnull
# out = sys.stdout
# errout = sys.stderr
print('Base configuration file is {0}'.format(baseConfig))
unittest.main()

View File

@@ -9,7 +9,7 @@
<NumberOfTracePlayers value="1"/>
<NumberOfMemChannels value="1"/>
<ControllerCoreDisableRefresh value="0"/>
<ControllerCoreManualRefresh value="0"/>
<ControllerCoreRowGranularRef value="0"/>
<ThermalSimulation value="0"/>
<SimulationProgressBar value="1"/>
<NumberOfDevicesOnDIMM value = "8" />

View File

@@ -0,0 +1,6 @@
sim.dram0 Total Energy: 45565500.00 pJ
sim.dram0 Average Power: 2156.95 mW
sim.dram0 Total Time: 20642500 ps
sim.dram0 AVG BW: 45.44 Gibit/s (45.44 %)
sim.dram0 AVG BW/IDLE: 45.44 Gibit/s (45.44 %)
sim.dram0 MAX BW: 100.00 Gibit/s