From bc73bb70dfa47c69037a08ba03a02c0481837a40 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=89der=20F=2E=20Zulian?= Date: Mon, 14 Nov 2016 01:40:15 +0100 Subject: [PATCH] New test: run with base config and compare output. --- .../tests/continuous_testing_py/autotest.py | 47 ++++++++++++++----- .../continuous_testing_py/baseconfig.xml | 2 +- .../baseconfig_expected.out | 6 +++ 3 files changed, 41 insertions(+), 14 deletions(-) create mode 100644 DRAMSys/tests/continuous_testing_py/baseconfig_expected.out diff --git a/DRAMSys/tests/continuous_testing_py/autotest.py b/DRAMSys/tests/continuous_testing_py/autotest.py index ffd146df..c0c551ca 100644 --- a/DRAMSys/tests/continuous_testing_py/autotest.py +++ b/DRAMSys/tests/continuous_testing_py/autotest.py @@ -57,7 +57,7 @@ simdir = builddir + '/simulator' mcConfigPath = rootdir + '/DRAMSys/simulator/resources/configs/mcconfigs' memSpecsPath = rootdir + '/DRAMSys/simulator/resources/configs/memspecs' -baseConfig = workingdir + '/baseconfig.xml' +baseConfigPath = workingdir + '/baseconfig.xml' def build_project(): @@ -72,7 +72,6 @@ def build_project(): return ret -@unittest.skip("skipping this") class TestBuild(unittest.TestCase): def test_build_project(self): """ The project's build process should succeed """ @@ -82,8 +81,7 @@ class TestBuild(unittest.TestCase): shutil.rmtree(builddir) -@unittest.skip("skipping this") -class TestOutput(unittest.TestCase): +class TestRun(unittest.TestCase): def setUp(self): build_project() @@ -92,27 +90,51 @@ class TestOutput(unittest.TestCase): os.chdir(simdir) self.assertEqual(subprocess.call(['./dramSys'], stdout=out), 0) - def test_run_with_base_config(self): - """ running dramSys with base config file output match reference """ - os.chdir(simdir) - self.assertEqual(subprocess.call(['./dramSys', baseConfig], - stdout=out), 0) - def tearDown(self): shutil.rmtree(builddir) +class TestOutput(unittest.TestCase): + def setUp(self): + self.tfd, self.tfpath = tempfile.mkstemp() + self.outrefpath = workingdir + '/baseconfig_expected.out' + build_project() + + def filter_output(self, fname): + with open(fname, 'r') as f: + lines = f.readlines() + f.close() + return [x for x in lines if x.startswith('sim.dram')] + + def test_run_with_base_config(self): + """ running dramSys with base config, output match reference """ + os.chdir(simdir) + with open(self.tfpath, 'w') as f: + self.assertEqual(subprocess.call(['./dramSys', baseConfigPath], + stdout=f), 0) + f.close() + tout = self.filter_output(self.tfpath) + tref = self.filter_output(self.outrefpath) + self.assertListEqual(tout, tref) + + def tearDown(self): + shutil.rmtree(builddir) + os.unlink(self.tfpath) + + # This is an example that shows how to skip a test. -# @unittest.skip("skipping this") +@unittest.skip("skipping this") class TestDummy(unittest.TestCase): def setUp(self): os.chdir(workingdir) def test_list_files(self): - print('Current working directory is {0}'.format(os.getcwd())) + """ Test that lists some configuration files with XML extension """ + print('\nPath is: {}\n'.format(mcConfigPath)) for file in os.listdir(mcConfigPath): if file.endswith(".xml"): print(file) + print('\nPath is: {}\n'.format(memSpecsPath)) for file in os.listdir(memSpecsPath): if file.endswith(".xml"): print(file) @@ -124,5 +146,4 @@ if __name__ == '__main__': errout = devnull # out = sys.stdout # errout = sys.stderr - print('Base configuration file is {0}'.format(baseConfig)) unittest.main() diff --git a/DRAMSys/tests/continuous_testing_py/baseconfig.xml b/DRAMSys/tests/continuous_testing_py/baseconfig.xml index 0608f201..c32bd794 100644 --- a/DRAMSys/tests/continuous_testing_py/baseconfig.xml +++ b/DRAMSys/tests/continuous_testing_py/baseconfig.xml @@ -9,7 +9,7 @@ - + diff --git a/DRAMSys/tests/continuous_testing_py/baseconfig_expected.out b/DRAMSys/tests/continuous_testing_py/baseconfig_expected.out new file mode 100644 index 00000000..e0456d46 --- /dev/null +++ b/DRAMSys/tests/continuous_testing_py/baseconfig_expected.out @@ -0,0 +1,6 @@ +sim.dram0 Total Energy: 45565500.00 pJ +sim.dram0 Average Power: 2156.95 mW +sim.dram0 Total Time: 20642500 ps +sim.dram0 AVG BW: 45.44 Gibit/s (45.44 %) +sim.dram0 AVG BW/IDLE: 45.44 Gibit/s (45.44 %) +sim.dram0 MAX BW: 100.00 Gibit/s