tlm protocol, record in interface methods
This commit is contained in:
@@ -4,7 +4,7 @@
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<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-60060699001507781" id="org.eclipse.cdt.managedbuilder.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings" parameter="${COMMAND} -E -P -v -dD "${INPUTS}" -std=c++11">
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-2055719358" id="org.eclipse.cdt.managedbuilder.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings" parameter="${COMMAND} -E -P -v -dD "${INPUTS}" -std=c++11">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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@@ -14,7 +14,7 @@
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<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-60060699001507781" id="org.eclipse.cdt.managedbuilder.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings" parameter="${COMMAND} -E -P -v -dD "${INPUTS}" -std=c++11">
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-2055719358" id="org.eclipse.cdt.managedbuilder.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings" parameter="${COMMAND} -E -P -v -dD "${INPUTS}" -std=c++11">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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@@ -4,7 +4,7 @@
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<parameter id="openPagePolicy" type="bool" value="1" />
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<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
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<parameter id="refreshAwareScheduling" type="bool" value="0" />
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<parameter id="maxNrOfTransactionsInDram" type="uint" value="100" />
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<parameter id="maxNrOfTransactionsInDram" type="uint" value="2000" />
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<parameter id="scheduler" type="string" value="FR_FCFS" />
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<parameter id="capsize" type="uint" value="5" />
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</memconfig>
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@@ -4,7 +4,7 @@
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<parameter id="openPagePolicy" type="bool" value="1" />
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<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
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<parameter id="refreshAwareScheduling" type="bool" value="0" />
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<parameter id="maxNrOfTransactionsInDram" type="uint" value="100" />
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<parameter id="maxNrOfTransactionsInDram" type="uint" value="2000" />
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<parameter id="scheduler" type="string" value="FR_FCFS" />
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<parameter id="capsize" type="uint" value="5" />
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</memconfig>
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@@ -4,7 +4,7 @@
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<parameter id="openPagePolicy" type="bool" value="1" />
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<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
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<parameter id="refreshAwareScheduling" type="bool" value="0" />
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<parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
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<parameter id="maxNrOfTransactionsInDram" type="uint" value="2000" />
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<parameter id="scheduler" type="string" value="FR_FCFS" />
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<parameter id="capsize" type="uint" value="5" />
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</memconfig>
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@@ -1,5 +1,6 @@
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
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<memspec>
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<parameter id="memoryId" type="string" value="JEDEC_256Mb_WIDEIO_SDR-200_128bit" />
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<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
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<memarchitecturespec>
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@@ -0,0 +1,67 @@
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
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<memspec>
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<parameter id="memoryId" type="string" value="JEDEC_256Mb_WIDEIO_SDR-200_128bit" />
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<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
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<memarchitecturespec>
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<parameter id="width" type="uint" value="128" />
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<parameter id="nbrOfBanks" type="uint" value="4" />
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<parameter id="nbrOfRanks" type="uint" value="1" />
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<parameter id="nbrOfColumns" type="uint" value="128" />
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<parameter id="nbrOfRows" type="uint" value="2048" />
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<parameter id="dataRate" type="uint" value="1" />
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<parameter id="burstLength" type="uint" value="4" />
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</memarchitecturespec>
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<memtimingspec>
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<parameter id="clkMhz" type="double" value="200" />
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<parameter id="RC" type="uint" value="12" />
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<parameter id="RCD" type="uint" value="4" />
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<parameter id="RL" type="uint" value="3" />
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<parameter id="RP" type="uint" value="4" />
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<parameter id="RFC" type="uint" value="18" />
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<parameter id="RAS" type="uint" value="9" />
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<parameter id="WL" type="uint" value="1" />
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<parameter id="AL" type="uint" value="0" />
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<parameter id="DQSCK" type="uint" value="1" />
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<parameter id="RTP" type="uint" value="4" />
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<parameter id="WR" type="uint" value="3" />
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<parameter id="XP" type="uint" value="2" />
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<parameter id="XPDLL" type="uint" value="2" />
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<parameter id="XS" type="uint" value="20" />
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<parameter id="XSDLL" type="uint" value="20" />
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<parameter id="REFI" type="uint" value="3120" />
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<parameter id="CL" type="uint" value="3" />
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<parameter id="TAW" type="uint" value="10" />
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<parameter id="RRD" type="uint" value="2" />
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<parameter id="CCD" type="uint" value="1" />
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<parameter id="WTR" type="uint" value="4" />
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<parameter id="CKE" type="uint" value="3" />
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<parameter id="CKESR" type="uint" value="3" />
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</memtimingspec>
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<mempowerspec>
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<parameter id="idd0" type="double" value="5.88" />
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<parameter id="idd02" type="double" value="21.18" />
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<parameter id="idd2p0" type="double" value="0.05" />
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<parameter id="idd2p02" type="double" value="0.17" />
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<parameter id="idd2p1" type="double" value="0.05" />
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<parameter id="idd2p12" type="double" value="0.17" />
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<parameter id="idd2n" type="double" value="0.13" />
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<parameter id="idd2n2" type="double" value="4.04" />
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<parameter id="idd3p0" type="double" value="0.25" />
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<parameter id="idd3p02" type="double" value="1.49" />
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<parameter id="idd3p1" type="double" value="0.25" />
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<parameter id="idd3p12" type="double" value="1.49" />
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<parameter id="idd3n" type="double" value="0.52" />
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<parameter id="idd3n2" type="double" value="6.55" />
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<parameter id="idd4r" type="double" value="1.41" />
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<parameter id="idd4r2" type="double" value="85.73" />
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<parameter id="idd4w" type="double" value="1.42" />
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<parameter id="idd4w2" type="double" value="60.79" />
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<parameter id="idd5" type="double" value="14.43" />
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<parameter id="idd52" type="double" value="48.17" />
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<parameter id="idd6" type="double" value="0.07" />
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<parameter id="idd62" type="double" value="0.27" />
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<parameter id="vdd" type="double" value="1.8" />
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<parameter id="vdd2" type="double" value="1.2" />
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</mempowerspec>
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</memspec>
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@@ -0,0 +1,67 @@
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
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<memspec>
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<parameter id="memoryId" type="string" value="JEDEC_256Mb_WIDEIO_SDR-266_128bit" />
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<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
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<memarchitecturespec>
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<parameter id="width" type="uint" value="128" />
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<parameter id="nbrOfBanks" type="uint" value="4" />
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<parameter id="nbrOfRanks" type="uint" value="1" />
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<parameter id="nbrOfColumns" type="uint" value="128" />
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<parameter id="nbrOfRows" type="uint" value="2048" />
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<parameter id="dataRate" type="uint" value="1" />
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<parameter id="burstLength" type="uint" value="4" />
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</memarchitecturespec>
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<memtimingspec>
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<parameter id="clkMhz" type="double" value="266" />
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<parameter id="RC" type="uint" value="16" />
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<parameter id="RCD" type="uint" value="5" />
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<parameter id="RL" type="uint" value="3" />
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<parameter id="RP" type="uint" value="5" />
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<parameter id="RFC" type="uint" value="24" />
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<parameter id="RAS" type="uint" value="12" />
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<parameter id="WL" type="uint" value="1" />
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<parameter id="AL" type="uint" value="0" />
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<parameter id="DQSCK" type="uint" value="1" />
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<parameter id="RTP" type="uint" value="4" />
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<parameter id="WR" type="uint" value="4" />
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<parameter id="XP" type="uint" value="3" />
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<parameter id="XPDLL" type="uint" value="3" />
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<parameter id="XS" type="uint" value="27" />
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<parameter id="XSDLL" type="uint" value="27" />
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<parameter id="REFI" type="uint" value="3120" />
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<parameter id="CL" type="uint" value="3" />
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<parameter id="TAW" type="uint" value="14" />
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<parameter id="RRD" type="uint" value="3" />
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<parameter id="CCD" type="uint" value="1" />
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<parameter id="WTR" type="uint" value="6" />
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<parameter id="CKE" type="uint" value="3" />
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<parameter id="CKESR" type="uint" value="6" />
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</memtimingspec>
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<mempowerspec>
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<parameter id="idd0" type="double" value="6.06" />
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<parameter id="idd02" type="double" value="21.82" />
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<parameter id="idd2p0" type="double" value="0.05" />
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<parameter id="idd2p02" type="double" value="0.17" />
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<parameter id="idd2p1" type="double" value="0.05" />
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<parameter id="idd2p12" type="double" value="0.17" />
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<parameter id="idd2n" type="double" value="0.16" />
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<parameter id="idd2n2" type="double" value="4.76" />
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<parameter id="idd3p0" type="double" value="0.25" />
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<parameter id="idd3p02" type="double" value="1.49" />
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<parameter id="idd3p1" type="double" value="0.25" />
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<parameter id="idd3p12" type="double" value="1.49" />
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<parameter id="idd3n" type="double" value="0.58" />
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<parameter id="idd3n2" type="double" value="7.24" />
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<parameter id="idd4r" type="double" value="1.82" />
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<parameter id="idd4r2" type="double" value="111.22" />
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<parameter id="idd4w" type="double" value="1.82" />
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<parameter id="idd4w2" type="double" value="78.0" />
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<parameter id="idd5" type="double" value="14.48" />
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<parameter id="idd52" type="double" value="48.34" />
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<parameter id="idd6" type="double" value="0.07" />
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<parameter id="idd62" type="double" value="0.27" />
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<parameter id="vdd" type="double" value="1.8" />
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<parameter id="vdd2" type="double" value="1.2" />
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</mempowerspec>
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</memspec>
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@@ -0,0 +1,55 @@
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
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<memspec>
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<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR2-1066_16bit_H" />
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<parameter id="memoryType" type="string" value="DDR2" />
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<memarchitecturespec>
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<parameter id="width" type="uint" value="16" />
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<parameter id="nbrOfBanks" type="uint" value="8" />
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<parameter id="nbrOfRanks" type="uint" value="1" />
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<parameter id="nbrOfColumns" type="uint" value="1024" />
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<parameter id="nbrOfRows" type="uint" value="8192" />
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<parameter id="dataRate" type="uint" value="2" />
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<parameter id="burstLength" type="uint" value="8" />
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</memarchitecturespec>
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<memtimingspec>
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<parameter id="clkMhz" type="double" value="533" />
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<parameter id="REFI" type="uint" value="3120" />
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<parameter id="RFC" type="uint" value="68" />
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<parameter id="CL" type="uint" value="7" />
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<parameter id="FAW" type="uint" value="24" />
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<parameter id="RRD" type="uint" value="6" />
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<parameter id="CCD" type="uint" value="2" />
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<parameter id="WTR" type="uint" value="4" />
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<parameter id="CKE" type="uint" value="3" />
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<parameter id="CKESR" type="uint" value="4" />
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<parameter id="RC" type="uint" value="31" />
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<parameter id="RCD" type="uint" value="7" />
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<parameter id="RL" type="uint" value="7" />
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<parameter id="RP" type="uint" value="7" />
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<parameter id="RAS" type="uint" value="24" />
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<parameter id="WL" type="uint" value="6" />
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<parameter id="AL" type="uint" value="0" />
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<parameter id="DQSCK" type="uint" value="0" />
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<parameter id="RTP" type="uint" value="4" />
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<parameter id="WR" type="uint" value="8" />
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<parameter id="XP" type="uint" value="3" />
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<parameter id="XPDLL" type="uint" value="10" />
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<parameter id="XS" type="uint" value="74" />
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<parameter id="XSDLL" type="uint" value="200" />
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</memtimingspec>
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<mempowerspec>
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<parameter id="idd0" type="double" value="90.0" />
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<parameter id="idd2p0" type="double" value="7.0" />
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<parameter id="idd2p1" type="double" value="7.0" />
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<parameter id="idd2n" type="double" value="36.0" />
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||||
<parameter id="idd3p0" type="double" value="10.0" />
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||||
<parameter id="idd3p1" type="double" value="23.0" />
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||||
<parameter id="idd3n" type="double" value="42.0" />
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||||
<parameter id="idd4w" type="double" value="185.0" />
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||||
<parameter id="idd4r" type="double" value="180.0" />
|
||||
<parameter id="idd5" type="double" value="160.0" />
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||||
<parameter id="idd6" type="double" value="7.0" />
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||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
</mempowerspec>
|
||||
</memspec>
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@@ -0,0 +1,55 @@
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||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR2-800_16bit_H" />
|
||||
<parameter id="memoryType" type="string" value="DDR2" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="8192" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="400" />
|
||||
<parameter id="REFI" type="uint" value="3120" />
|
||||
<parameter id="RFC" type="uint" value="51" />
|
||||
<parameter id="CL" type="uint" value="5" />
|
||||
<parameter id="FAW" type="uint" value="18" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="2" />
|
||||
<parameter id="WTR" type="uint" value="3" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
<parameter id="RC" type="uint" value="23" />
|
||||
<parameter id="RCD" type="uint" value="5" />
|
||||
<parameter id="RL" type="uint" value="5" />
|
||||
<parameter id="RP" type="uint" value="5" />
|
||||
<parameter id="RAS" type="uint" value="16" />
|
||||
<parameter id="WL" type="uint" value="4" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="3" />
|
||||
<parameter id="WR" type="uint" value="6" />
|
||||
<parameter id="XP" type="uint" value="2" />
|
||||
<parameter id="XPDLL" type="uint" value="8" />
|
||||
<parameter id="XS" type="uint" value="55" />
|
||||
<parameter id="XSDLL" type="uint" value="200" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="80.0" />
|
||||
<parameter id="idd2p0" type="double" value="7.0" />
|
||||
<parameter id="idd2p1" type="double" value="7.0" />
|
||||
<parameter id="idd2n" type="double" value="30.0" />
|
||||
<parameter id="idd3p0" type="double" value="10.0" />
|
||||
<parameter id="idd3p1" type="double" value="20.0" />
|
||||
<parameter id="idd3n" type="double" value="35.0" />
|
||||
<parameter id="idd4r" type="double" value="150.0" />
|
||||
<parameter id="idd4w" type="double" value="160.0" />
|
||||
<parameter id="idd5" type="double" value="150.0" />
|
||||
<parameter id="idd6" type="double" value="7.0" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_16bit_G" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="8192" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="27" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="75.0" />
|
||||
<parameter id="idd2p0" type="double" value="12.0" />
|
||||
<parameter id="idd2p1" type="double" value="25.0" />
|
||||
<parameter id="idd2n" type="double" value="35.0" />
|
||||
<parameter id="idd3p0" type="double" value="30.0" />
|
||||
<parameter id="idd3p1" type="double" value="30.0" />
|
||||
<parameter id="idd3n" type="double" value="45.0" />
|
||||
<parameter id="idd4w" type="double" value="155.0" />
|
||||
<parameter id="idd4r" type="double" value="140.0" />
|
||||
<parameter id="idd5" type="double" value="160.0" />
|
||||
<parameter id="idd6" type="double" value="8.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_16bit_G_2s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="8192" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="27" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="70.22" />
|
||||
<parameter id="idd2p0" type="double" value="9.07" />
|
||||
<parameter id="idd2p1" type="double" value="18.90" />
|
||||
<parameter id="idd2n" type="double" value="30.95" />
|
||||
<parameter id="idd3p0" type="double" value="26.0" />
|
||||
<parameter id="idd3p1" type="double" value="26.0" />
|
||||
<parameter id="idd3n" type="double" value="39.0" />
|
||||
<parameter id="idd4w" type="double" value="144.31" />
|
||||
<parameter id="idd4r" type="double" value="128.59" />
|
||||
<parameter id="idd5" type="double" value="150.64" />
|
||||
<parameter id="idd6" type="double" value="6.02" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_16bit_G_3s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="8192" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="27" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="71.81" />
|
||||
<parameter id="idd2p0" type="double" value="10.04" />
|
||||
<parameter id="idd2p1" type="double" value="20.93" />
|
||||
<parameter id="idd2n" type="double" value="32.3" />
|
||||
<parameter id="idd3p0" type="double" value="27.33" />
|
||||
<parameter id="idd3p1" type="double" value="27.33" />
|
||||
<parameter id="idd3n" type="double" value="41.0" />
|
||||
<parameter id="idd4w" type="double" value="147.87" />
|
||||
<parameter id="idd4r" type="double" value="132.39" />
|
||||
<parameter id="idd5" type="double" value="153.76" />
|
||||
<parameter id="idd6" type="double" value="6.68" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_16bit_G_mu" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="8192" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="27" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="67.04" />
|
||||
<parameter id="idd2p0" type="double" value="7.12" />
|
||||
<parameter id="idd2p1" type="double" value="14.83" />
|
||||
<parameter id="idd2n" type="double" value="28.25" />
|
||||
<parameter id="idd3p0" type="double" value="23.34" />
|
||||
<parameter id="idd3p1" type="double" value="23.34" />
|
||||
<parameter id="idd3n" type="double" value="35.01" />
|
||||
<parameter id="idd4w" type="double" value="137.19" />
|
||||
<parameter id="idd4r" type="double" value="120.98" />
|
||||
<parameter id="idd5" type="double" value="144.41" />
|
||||
<parameter id="idd6" type="double" value="4.70" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_8bit_G" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="60.0" />
|
||||
<parameter id="idd2p0" type="double" value="12.0" />
|
||||
<parameter id="idd2p1" type="double" value="25.0" />
|
||||
<parameter id="idd2n" type="double" value="35.0" />
|
||||
<parameter id="idd3p0" type="double" value="30.0" />
|
||||
<parameter id="idd3p1" type="double" value="30.0" />
|
||||
<parameter id="idd3n" type="double" value="40.0" />
|
||||
<parameter id="idd4w" type="double" value="110.0" />
|
||||
<parameter id="idd4r" type="double" value="105.0" />
|
||||
<parameter id="idd5" type="double" value="160.0" />
|
||||
<parameter id="idd6" type="double" value="8.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_8bit_G_2s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="56.18" />
|
||||
<parameter id="idd2p0" type="double" value="9.07" />
|
||||
<parameter id="idd2p1" type="double" value="18.9" />
|
||||
<parameter id="idd2n" type="double" value="30.95" />
|
||||
<parameter id="idd3p0" type="double" value="26.0" />
|
||||
<parameter id="idd3p1" type="double" value="26.0" />
|
||||
<parameter id="idd3n" type="double" value="34.67" />
|
||||
<parameter id="idd4w" type="double" value="102.0" />
|
||||
<parameter id="idd4r" type="double" value="96.88" />
|
||||
<parameter id="idd5" type="double" value="150.64" />
|
||||
<parameter id="idd6" type="double" value="6.02" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_8bit_G_3s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="57.45" />
|
||||
<parameter id="idd2p0" type="double" value="10.04" />
|
||||
<parameter id="idd2p1" type="double" value="20.93" />
|
||||
<parameter id="idd2n" type="double" value="32.3" />
|
||||
<parameter id="idd3p0" type="double" value="27.33" />
|
||||
<parameter id="idd3p1" type="double" value="27.33" />
|
||||
<parameter id="idd3n" type="double" value="36.45" />
|
||||
<parameter id="idd4w" type="double" value="104.67" />
|
||||
<parameter id="idd4r" type="double" value="99.59" />
|
||||
<parameter id="idd5" type="double" value="153.76" />
|
||||
<parameter id="idd6" type="double" value="6.68" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1066_8bit_G_mu" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="53.63" />
|
||||
<parameter id="idd2p0" type="double" value="7.12" />
|
||||
<parameter id="idd2p1" type="double" value="14.83" />
|
||||
<parameter id="idd2n" type="double" value="28.25" />
|
||||
<parameter id="idd3p0" type="double" value="23.34" />
|
||||
<parameter id="idd3p1" type="double" value="23.34" />
|
||||
<parameter id="idd3n" type="double" value="31.12" />
|
||||
<parameter id="idd4w" type="double" value="96.68" />
|
||||
<parameter id="idd4r" type="double" value="91.47" />
|
||||
<parameter id="idd5" type="double" value="144.41" />
|
||||
<parameter id="idd6" type="double" value="4.70" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1600_8bit_G" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="88" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="6" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="96" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="6240" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="24" />
|
||||
<parameter id="RRD" type="uint" value="5" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="70.0" />
|
||||
<parameter id="idd2p0" type="double" value="12.0" />
|
||||
<parameter id="idd2p1" type="double" value="30.0" />
|
||||
<parameter id="idd2n" type="double" value="45.0" />
|
||||
<parameter id="idd3p0" type="double" value="35.0" />
|
||||
<parameter id="idd3p1" type="double" value="35.0" />
|
||||
<parameter id="idd3n" type="double" value="45.0" />
|
||||
<parameter id="idd4w" type="double" value="145.0" />
|
||||
<parameter id="idd4r" type="double" value="140.0" />
|
||||
<parameter id="idd5" type="double" value="170.0" />
|
||||
<parameter id="idd6" type="double" value="8.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1600_8bit_G_2s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="88" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="6" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="96" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="6240" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="24" />
|
||||
<parameter id="RRD" type="uint" value="5" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="65.19" />
|
||||
<parameter id="idd2p0" type="double" value="9.07" />
|
||||
<parameter id="idd2p1" type="double" value="22.68" />
|
||||
<parameter id="idd2n" type="double" value="40.0" />
|
||||
<parameter id="idd3p0" type="double" value="31.16" />
|
||||
<parameter id="idd3p1" type="double" value="31.16" />
|
||||
<parameter id="idd3n" type="double" value="40.07" />
|
||||
<parameter id="idd4w" type="double" value="130.17" />
|
||||
<parameter id="idd4r" type="double" value="127.49" />
|
||||
<parameter id="idd5" type="double" value="159.28" />
|
||||
<parameter id="idd6" type="double" value="6.02" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1600_8bit_G_3s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="88" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="6" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="96" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="6240" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="24" />
|
||||
<parameter id="RRD" type="uint" value="5" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="66.79" />
|
||||
<parameter id="idd2p0" type="double" value="10.04" />
|
||||
<parameter id="idd2p1" type="double" value="25.12" />
|
||||
<parameter id="idd2n" type="double" value="41.67" />
|
||||
<parameter id="idd3p0" type="double" value="32.44" />
|
||||
<parameter id="idd3p1" type="double" value="32.44" />
|
||||
<parameter id="idd3n" type="double" value="41.71" />
|
||||
<parameter id="idd4w" type="double" value="135.11" />
|
||||
<parameter id="idd4r" type="double" value="131.66" />
|
||||
<parameter id="idd5" type="double" value="162.85" />
|
||||
<parameter id="idd6" type="double" value="6.68" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_1Gb_DDR3-1600_8bit_G_mu" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="88" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="6" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="96" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="6240" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="24" />
|
||||
<parameter id="RRD" type="uint" value="5" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="61.99" />
|
||||
<parameter id="idd2p0" type="double" value="7.12" />
|
||||
<parameter id="idd2p1" type="double" value="17.8" />
|
||||
<parameter id="idd2n" type="double" value="36.68" />
|
||||
<parameter id="idd3p0" type="double" value="28.61" />
|
||||
<parameter id="idd3p1" type="double" value="28.61" />
|
||||
<parameter id="idd3n" type="double" value="36.78" />
|
||||
<parameter id="idd4w" type="double" value="120.28" />
|
||||
<parameter id="idd4r" type="double" value="119.16" />
|
||||
<parameter id="idd5" type="double" value="152.13" />
|
||||
<parameter id="idd6" type="double" value="4.7" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2GB_DDR3-1066_64bit_D_SODIMM" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="64" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="2" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="720.0" />
|
||||
<parameter id="idd2p0" type="double" value="80.0" />
|
||||
<parameter id="idd2p1" type="double" value="200.0" />
|
||||
<parameter id="idd2n" type="double" value="400.0" />
|
||||
<parameter id="idd3p0" type="double" value="240.0" />
|
||||
<parameter id="idd3p1" type="double" value="240.0" />
|
||||
<parameter id="idd3n" type="double" value="440.0" />
|
||||
<parameter id="idd4w" type="double" value="1200.0" />
|
||||
<parameter id="idd4r" type="double" value="1200.0" />
|
||||
<parameter id="idd5" type="double" value="1760.0" />
|
||||
<parameter id="idd6" type="double" value="48.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2GB_DDR3-1066_64bit_G_UDIMM" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="64" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="2" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="59" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="64" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="432.0" />
|
||||
<parameter id="idd2p0" type="double" value="108.0" />
|
||||
<parameter id="idd2p1" type="double" value="225.0" />
|
||||
<parameter id="idd2n" type="double" value="315.0" />
|
||||
<parameter id="idd3p0" type="double" value="270.0" />
|
||||
<parameter id="idd3p1" type="double" value="270.0" />
|
||||
<parameter id="idd3n" type="double" value="360.0" />
|
||||
<parameter id="idd4w" type="double" value="837.0" />
|
||||
<parameter id="idd4r" type="double" value="882.0" />
|
||||
<parameter id="idd5" type="double" value="1332.0" />
|
||||
<parameter id="idd6" type="double" value="90.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2GB_DDR3-1333_64bit_D_SODIMM" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="64" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="2" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="666" />
|
||||
<parameter id="RC" type="uint" value="33" />
|
||||
<parameter id="RCD" type="uint" value="9" />
|
||||
<parameter id="RL" type="uint" value="9" />
|
||||
<parameter id="RP" type="uint" value="9" />
|
||||
<parameter id="RFC" type="uint" value="74" />
|
||||
<parameter id="RAS" type="uint" value="24" />
|
||||
<parameter id="WL" type="uint" value="7" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="5" />
|
||||
<parameter id="WR" type="uint" value="10" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="16" />
|
||||
<parameter id="XS" type="uint" value="80" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="5200" />
|
||||
<parameter id="CL" type="uint" value="9" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="5" />
|
||||
<parameter id="CKE" type="uint" value="4" />
|
||||
<parameter id="CKESR" type="uint" value="5" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="800.0" />
|
||||
<parameter id="idd2p0" type="double" value="80.0" />
|
||||
<parameter id="idd2p1" type="double" value="200.0" />
|
||||
<parameter id="idd2n" type="double" value="440.0" />
|
||||
<parameter id="idd3p0" type="double" value="280.0" />
|
||||
<parameter id="idd3p1" type="double" value="280.0" />
|
||||
<parameter id="idd3n" type="double" value="480.0" />
|
||||
<parameter id="idd4w" type="double" value="1520.0" />
|
||||
<parameter id="idd4r" type="double" value="1440.0" />
|
||||
<parameter id="idd5" type="double" value="1920.0" />
|
||||
<parameter id="idd6" type="double" value="48.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2GB_DDR3-1600_64bit_G_UDIMM" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="64" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="2" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="88" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="5" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="96" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="32" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="5" />
|
||||
<parameter id="CKESR" type="uint" value="5" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="522.0" />
|
||||
<parameter id="idd2p0" type="double" value="108.0" />
|
||||
<parameter id="idd2p1" type="double" value="270.0" />
|
||||
<parameter id="idd2n" type="double" value="405.0" />
|
||||
<parameter id="idd3p0" type="double" value="315.0" />
|
||||
<parameter id="idd3p1" type="double" value="315.0" />
|
||||
<parameter id="idd3n" type="double" value="405.0" />
|
||||
<parameter id="idd4w" type="double" value="1152.0" />
|
||||
<parameter id="idd4r" type="double" value="1197.0" />
|
||||
<parameter id="idd5" type="double" value="1422.0" />
|
||||
<parameter id="idd6" type="double" value="90.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1066_8bit_D" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="86" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="92" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="75.0" />
|
||||
<parameter id="idd2p0" type="double" value="12.0" />
|
||||
<parameter id="idd2p1" type="double" value="25.0" />
|
||||
<parameter id="idd2n" type="double" value="32.0" />
|
||||
<parameter id="idd3p0" type="double" value="30.0" />
|
||||
<parameter id="idd3p1" type="double" value="30.0" />
|
||||
<parameter id="idd3n" type="double" value="35.0" />
|
||||
<parameter id="idd4w" type="double" value="145.0" />
|
||||
<parameter id="idd4r" type="double" value="140.0" />
|
||||
<parameter id="idd5" type="double" value="190.0" />
|
||||
<parameter id="idd6" type="double" value="12.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1066_8bit_D_2s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="86" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="92" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="70.08" />
|
||||
<parameter id="idd2p0" type="double" value="8.78" />
|
||||
<parameter id="idd2p1" type="double" value="18.29" />
|
||||
<parameter id="idd2n" type="double" value="27.52" />
|
||||
<parameter id="idd3p0" type="double" value="26.23" />
|
||||
<parameter id="idd3p1" type="double" value="26.23" />
|
||||
<parameter id="idd3n" type="double" value="30.6" />
|
||||
<parameter id="idd4w" type="double" value="131.42" />
|
||||
<parameter id="idd4r" type="double" value="128.07" />
|
||||
<parameter id="idd5" type="double" value="178.56" />
|
||||
<parameter id="idd6" type="double" value="8.41" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1066_8bit_D_3s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="86" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="92" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="71.72" />
|
||||
<parameter id="idd2p0" type="double" value="9.85" />
|
||||
<parameter id="idd2p1" type="double" value="20.53" />
|
||||
<parameter id="idd2n" type="double" value="29.02" />
|
||||
<parameter id="idd3p0" type="double" value="27.48" />
|
||||
<parameter id="idd3p1" type="double" value="27.48" />
|
||||
<parameter id="idd3n" type="double" value="32.06" />
|
||||
<parameter id="idd4w" type="double" value="135.95" />
|
||||
<parameter id="idd4r" type="double" value="132.05" />
|
||||
<parameter id="idd5" type="double" value="182.37" />
|
||||
<parameter id="idd6" type="double" value="9.6" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1066_8bit_D_mu" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="RC" type="uint" value="27" />
|
||||
<parameter id="RCD" type="uint" value="7" />
|
||||
<parameter id="RL" type="uint" value="7" />
|
||||
<parameter id="RP" type="uint" value="7" />
|
||||
<parameter id="RFC" type="uint" value="86" />
|
||||
<parameter id="RAS" type="uint" value="20" />
|
||||
<parameter id="WL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="8" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="13" />
|
||||
<parameter id="XS" type="uint" value="92" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="7" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="66.8" />
|
||||
<parameter id="idd2p0" type="double" value="6.63" />
|
||||
<parameter id="idd2p1" type="double" value="13.82" />
|
||||
<parameter id="idd2n" type="double" value="24.54" />
|
||||
<parameter id="idd3p0" type="double" value="23.71" />
|
||||
<parameter id="idd3p1" type="double" value="23.71" />
|
||||
<parameter id="idd3n" type="double" value="27.67" />
|
||||
<parameter id="idd4w" type="double" value="122.38" />
|
||||
<parameter id="idd4r" type="double" value="120.13" />
|
||||
<parameter id="idd5" type="double" value="170.93" />
|
||||
<parameter id="idd6" type="double" value="6.01" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1600_16bit_D" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="128" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="5" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="136" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="32" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="110.0" />
|
||||
<parameter id="idd2p0" type="double" value="12.0" />
|
||||
<parameter id="idd2p1" type="double" value="40.0" />
|
||||
<parameter id="idd2n" type="double" value="42.0" />
|
||||
<parameter id="idd3p0" type="double" value="45.0" />
|
||||
<parameter id="idd3p1" type="double" value="45.0" />
|
||||
<parameter id="idd3n" type="double" value="45.0" />
|
||||
<parameter id="idd4w" type="double" value="280.0" />
|
||||
<parameter id="idd4r" type="double" value="270.0" />
|
||||
<parameter id="idd5" type="double" value="215.0" />
|
||||
<parameter id="idd6" type="double" value="12.0" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1600_16bit_D_2s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="128" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="5" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="136" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="32" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="102.83" />
|
||||
<parameter id="idd2p0" type="double" value="8.77" />
|
||||
<parameter id="idd2p1" type="double" value="29.25" />
|
||||
<parameter id="idd2n" type="double" value="36.89" />
|
||||
<parameter id="idd3p0" type="double" value="38.75" />
|
||||
<parameter id="idd3p1" type="double" value="38.75" />
|
||||
<parameter id="idd3n" type="double" value="38.75" />
|
||||
<parameter id="idd4w" type="double" value="260.04" />
|
||||
<parameter id="idd4r" type="double" value="247.34" />
|
||||
<parameter id="idd5" type="double" value="202.17" />
|
||||
<parameter id="idd6" type="double" value="8.67" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1600_16bit_D_3s" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="128" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="5" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="136" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="32" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="105.25" />
|
||||
<parameter id="idd2p0" type="double" value="9.85" />
|
||||
<parameter id="idd2p1" type="double" value="32.83" />
|
||||
<parameter id="idd2n" type="double" value="38.59" />
|
||||
<parameter id="idd3p0" type="double" value="40.83" />
|
||||
<parameter id="idd3p1" type="double" value="40.83" />
|
||||
<parameter id="idd3n" type="double" value="40.83" />
|
||||
<parameter id="idd4w" type="double" value="266.69" />
|
||||
<parameter id="idd4r" type="double" value="254.89" />
|
||||
<parameter id="idd5" type="double" value="206.44" />
|
||||
<parameter id="idd6" type="double" value="9.78" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_DDR3-1600_16bit_D_mu" />
|
||||
<parameter id="memoryType" type="string" value="DDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="RC" type="uint" value="38" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RFC" type="uint" value="128" />
|
||||
<parameter id="RAS" type="uint" value="28" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="DQSCK" type="uint" value="0" />
|
||||
<parameter id="RTP" type="uint" value="6" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="XP" type="uint" value="5" />
|
||||
<parameter id="XPDLL" type="uint" value="20" />
|
||||
<parameter id="XS" type="uint" value="136" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="REFI" type="uint" value="4160" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="FAW" type="uint" value="32" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="6" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="4" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="98.06" />
|
||||
<parameter id="idd2p0" type="double" value="6.62" />
|
||||
<parameter id="idd2p1" type="double" value="22.09" />
|
||||
<parameter id="idd2n" type="double" value="33.49" />
|
||||
<parameter id="idd3p0" type="double" value="34.59" />
|
||||
<parameter id="idd3p1" type="double" value="34.59" />
|
||||
<parameter id="idd3n" type="double" value="34.59" />
|
||||
<parameter id="idd4w" type="double" value="246.74" />
|
||||
<parameter id="idd4r" type="double" value="232.24" />
|
||||
<parameter id="idd5" type="double" value="193.62" />
|
||||
<parameter id="idd6" type="double" value="6.45" />
|
||||
<parameter id="vdd" type="double" value="1.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,54 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_LPDDR-266_16bit_A" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="4" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="2048" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="133" />
|
||||
<parameter id="REFI" type="uint" value="2080" />
|
||||
<parameter id="RFC" type="uint" value="10" />
|
||||
<parameter id="RL" type="uint" value="3" />
|
||||
<parameter id="WL" type="uint" value="3" />
|
||||
<parameter id="CL" type="uint" value="3" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="3" />
|
||||
<parameter id="RAS" type="uint" value="6" />
|
||||
<parameter id="RCD" type="uint" value="3" />
|
||||
<parameter id="RC" type="uint" value="9" />
|
||||
<parameter id="RRD" type="uint" value="2" />
|
||||
<parameter id="RTP" type="uint" value="3" />
|
||||
<parameter id="WR" type="uint" value="2" />
|
||||
<parameter id="CCD" type="uint" value="2" />
|
||||
<parameter id="WTR" type="uint" value="1" />
|
||||
<parameter id="DQSCK" type="uint" value="1" />
|
||||
<parameter id="XP" type="uint" value="1" />
|
||||
<parameter id="XPDLL" type="uint" value="1" />
|
||||
<parameter id="XS" type="uint" value="15" />
|
||||
<parameter id="XSDLL" type="uint" value="15" />
|
||||
<parameter id="CKE" type="uint" value="1" />
|
||||
<parameter id="CKESR" type="uint" value="2" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="70.0" />
|
||||
<parameter id="idd2p0" type="double" value="0.6" />
|
||||
<parameter id="idd2p1" type="double" value="0.6" />
|
||||
<parameter id="idd2n" type="double" value="12.0" />
|
||||
<parameter id="idd3p0" type="double" value="3.6" />
|
||||
<parameter id="idd3p1" type="double" value="3.6" />
|
||||
<parameter id="idd3n" type="double" value="16.0" />
|
||||
<parameter id="idd4r" type="double" value="105.0" />
|
||||
<parameter id="idd4w" type="double" value="105.0" />
|
||||
<parameter id="idd5" type="double" value="170.0" />
|
||||
<parameter id="idd6" type="double" value="1.7" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,54 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_LPDDR-333_16bit_A" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="4" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="2048" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="166" />
|
||||
<parameter id="REFI" type="uint" value="2600" />
|
||||
<parameter id="RFC" type="uint" value="12" />
|
||||
<parameter id="RL" type="uint" value="3" />
|
||||
<parameter id="WL" type="uint" value="3" />
|
||||
<parameter id="CL" type="uint" value="3" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="3" />
|
||||
<parameter id="RAS" type="uint" value="7" />
|
||||
<parameter id="RCD" type="uint" value="3" />
|
||||
<parameter id="RC" type="uint" value="10" />
|
||||
<parameter id="RRD" type="uint" value="2" />
|
||||
<parameter id="RTP" type="uint" value="3" />
|
||||
<parameter id="WR" type="uint" value="3" />
|
||||
<parameter id="CCD" type="uint" value="2" />
|
||||
<parameter id="WTR" type="uint" value="1" />
|
||||
<parameter id="DQSCK" type="uint" value="1" />
|
||||
<parameter id="XP" type="uint" value="1" />
|
||||
<parameter id="XPDLL" type="uint" value="1" />
|
||||
<parameter id="XS" type="uint" value="19" />
|
||||
<parameter id="XSDLL" type="uint" value="19" />
|
||||
<parameter id="CKE" type="uint" value="1" />
|
||||
<parameter id="CKESR" type="uint" value="2" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="100.0" />
|
||||
<parameter id="idd2p0" type="double" value="0.6" />
|
||||
<parameter id="idd2p1" type="double" value="0.6" />
|
||||
<parameter id="idd2n" type="double" value="15.0" />
|
||||
<parameter id="idd3p0" type="double" value="3.6" />
|
||||
<parameter id="idd3p1" type="double" value="3.6" />
|
||||
<parameter id="idd3n" type="double" value="18.0" />
|
||||
<parameter id="idd4r" type="double" value="115.0" />
|
||||
<parameter id="idd4w" type="double" value="115.0" />
|
||||
<parameter id="idd5" type="double" value="170.0" />
|
||||
<parameter id="idd6" type="double" value="1.7" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,67 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_LPDDR2-1066-S4_16bit_A" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR2" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="533" />
|
||||
<parameter id="REFI" type="uint" value="2080" />
|
||||
<parameter id="RFC" type="uint" value="70" />
|
||||
<parameter id="RL" type="uint" value="8" />
|
||||
<parameter id="WL" type="uint" value="4" />
|
||||
<parameter id="CL" type="uint" value="8" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="10" />
|
||||
<parameter id="RAS" type="uint" value="23" />
|
||||
<parameter id="RCD" type="uint" value="10" />
|
||||
<parameter id="RC" type="uint" value="32" />
|
||||
<parameter id="FAW" type="uint" value="27" />
|
||||
<parameter id="RRD" type="uint" value="6" />
|
||||
<parameter id="RTP" type="uint" value="4" />
|
||||
<parameter id="WR" type="uint" value="10" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="4" />
|
||||
<parameter id="DQSCK" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="4" />
|
||||
<parameter id="XPDLL" type="uint" value="4" />
|
||||
<parameter id="XS" type="uint" value="75" />
|
||||
<parameter id="XSDLL" type="uint" value="75" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="8" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="20.0" />
|
||||
<parameter id="idd02" type="double" value="71.0" />
|
||||
<parameter id="idd2p0" type="double" value="0.5" />
|
||||
<parameter id="idd2p02" type="double" value="1.7" />
|
||||
<parameter id="idd2p1" type="double" value="0.5" />
|
||||
<parameter id="idd2p12" type="double" value="1.7" />
|
||||
<parameter id="idd2n" type="double" value="1.7" />
|
||||
<parameter id="idd2n2" type="double" value="22.0" />
|
||||
<parameter id="idd3p0" type="double" value="1.2" />
|
||||
<parameter id="idd3p02" type="double" value="4.12" />
|
||||
<parameter id="idd3p1" type="double" value="1.2" />
|
||||
<parameter id="idd3p12" type="double" value="4.12" />
|
||||
<parameter id="idd3n" type="double" value="1.2" />
|
||||
<parameter id="idd3n2" type="double" value="30.0" />
|
||||
<parameter id="idd4r" type="double" value="5.0" />
|
||||
<parameter id="idd4r2" type="double" value="226.0" />
|
||||
<parameter id="idd4w" type="double" value="10.0" />
|
||||
<parameter id="idd4w2" type="double" value="208.0" />
|
||||
<parameter id="idd5" type="double" value="15.0" />
|
||||
<parameter id="idd52" type="double" value="136.0" />
|
||||
<parameter id="idd6" type="double" value="1.2" />
|
||||
<parameter id="idd62" type="double" value="2.6" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,67 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_2Gb_LPDDR2-800-S4_16bit_A" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR2" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="16" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="400" />
|
||||
<parameter id="REFI" type="uint" value="1560" />
|
||||
<parameter id="RFC" type="uint" value="52" />
|
||||
<parameter id="RL" type="uint" value="6" />
|
||||
<parameter id="WL" type="uint" value="3" />
|
||||
<parameter id="CL" type="uint" value="6" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="8" />
|
||||
<parameter id="RAS" type="uint" value="17" />
|
||||
<parameter id="RCD" type="uint" value="8" />
|
||||
<parameter id="RC" type="uint" value="24" />
|
||||
<parameter id="FAW" type="uint" value="20" />
|
||||
<parameter id="RRD" type="uint" value="4" />
|
||||
<parameter id="RTP" type="uint" value="3" />
|
||||
<parameter id="WR" type="uint" value="6" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="3" />
|
||||
<parameter id="DQSCK" type="uint" value="1" />
|
||||
<parameter id="XP" type="uint" value="3" />
|
||||
<parameter id="XPDLL" type="uint" value="3" />
|
||||
<parameter id="XS" type="uint" value="56" />
|
||||
<parameter id="XSDLL" type="uint" value="56" />
|
||||
<parameter id="CKE" type="uint" value="3" />
|
||||
<parameter id="CKESR" type="uint" value="6" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="20.0" />
|
||||
<parameter id="idd02" type="double" value="56.0" />
|
||||
<parameter id="idd2p0" type="double" value="0.5" />
|
||||
<parameter id="idd2p02" type="double" value="1.7" />
|
||||
<parameter id="idd2p1" type="double" value="0.5" />
|
||||
<parameter id="idd2p12" type="double" value="1.7" />
|
||||
<parameter id="idd2n" type="double" value="1.7" />
|
||||
<parameter id="idd2n2" type="double" value="21.0" />
|
||||
<parameter id="idd3p0" type="double" value="1.2" />
|
||||
<parameter id="idd3p02" type="double" value="4.12" />
|
||||
<parameter id="idd3p1" type="double" value="1.2" />
|
||||
<parameter id="idd3p12" type="double" value="4.12" />
|
||||
<parameter id="idd3n" type="double" value="1.2" />
|
||||
<parameter id="idd3n2" type="double" value="29.0" />
|
||||
<parameter id="idd4r" type="double" value="5.0" />
|
||||
<parameter id="idd4r2" type="double" value="216.0" />
|
||||
<parameter id="idd4w" type="double" value="10.0" />
|
||||
<parameter id="idd4w2" type="double" value="203.0" />
|
||||
<parameter id="idd5" type="double" value="15.0" />
|
||||
<parameter id="idd52" type="double" value="136.0" />
|
||||
<parameter id="idd6" type="double" value="1.2" />
|
||||
<parameter id="idd62" type="double" value="2.6" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,62 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_4Gb_DDR4-1866_8bit_A" />
|
||||
<parameter id="memoryType" type="string" value="DDR4" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBankGroups" type="uint" value="4" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="16" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="933" />
|
||||
<parameter id="REFI" type="uint" value="3644" />
|
||||
<parameter id="RFC" type="uint" value="243" />
|
||||
<parameter id="RL" type="uint" value="13" />
|
||||
<parameter id="WL" type="uint" value="12" />
|
||||
<parameter id="CL" type="uint" value="13" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="13" />
|
||||
<parameter id="RAS" type="uint" value="32" />
|
||||
<parameter id="RCD" type="uint" value="13" />
|
||||
<parameter id="RC" type="uint" value="45" />
|
||||
<parameter id="FAW" type="uint" value="22" />
|
||||
<parameter id="RTP" type="uint" value="8" />
|
||||
<parameter id="WR" type="uint" value="14" />
|
||||
<parameter id="RRD_S" type="uint" value="4" />
|
||||
<parameter id="RRD_L" type="uint" value="5" />
|
||||
<parameter id="CCD_S" type="uint" value="4" />
|
||||
<parameter id="CCD_L" type="uint" value="5" />
|
||||
<parameter id="WTR_S" type="uint" value="3" />
|
||||
<parameter id="WTR_L" type="uint" value="7" />
|
||||
<parameter id="DQSCK" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="8" />
|
||||
<parameter id="XPDLL" type="uint" value="255" />
|
||||
<parameter id="XS" type="uint" value="252" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="CKE" type="uint" value="6" />
|
||||
<parameter id="CKESR" type="uint" value="7" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="56.25" />
|
||||
<parameter id="idd02" type="double" value="4.05" />
|
||||
<parameter id="idd2p0" type="double" value="17.0" />
|
||||
<parameter id="idd2p1" type="double" value="17.0" />
|
||||
<parameter id="idd2n" type="double" value="33.75" />
|
||||
<parameter id="idd3p0" type="double" value="22.5" />
|
||||
<parameter id="idd3p1" type="double" value="22.5" />
|
||||
<parameter id="idd3n" type="double" value="39.5" />
|
||||
<parameter id="idd4r" type="double" value="157.5" />
|
||||
<parameter id="idd4w" type="double" value="135.0" />
|
||||
<parameter id="idd5" type="double" value="118.0" />
|
||||
<parameter id="idd6" type="double" value="20.25" />
|
||||
<parameter id="idd62" type="double" value="2.6" />
|
||||
<parameter id="vdd" type="double" value="1.2" />
|
||||
<parameter id="vdd2" type="double" value="2.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,62 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_4Gb_DDR4-2400_8bit_A" />
|
||||
<parameter id="memoryType" type="string" value="DDR4" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="8" />
|
||||
<parameter id="nbrOfBankGroups" type="uint" value="4" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="16" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="32768" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="1200" />
|
||||
<parameter id="REFI" type="uint" value="4680" />
|
||||
<parameter id="RFC" type="uint" value="313" />
|
||||
<parameter id="RL" type="uint" value="16" />
|
||||
<parameter id="WL" type="uint" value="16" />
|
||||
<parameter id="CL" type="uint" value="16" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="16" />
|
||||
<parameter id="RAS" type="uint" value="39" />
|
||||
<parameter id="RCD" type="uint" value="16" />
|
||||
<parameter id="RC" type="uint" value="55" />
|
||||
<parameter id="FAW" type="uint" value="26" />
|
||||
<parameter id="RTP" type="uint" value="12" />
|
||||
<parameter id="WR" type="uint" value="18" />
|
||||
<parameter id="RRD_S" type="uint" value="4" />
|
||||
<parameter id="RRD_L" type="uint" value="6" />
|
||||
<parameter id="CCD_S" type="uint" value="4" />
|
||||
<parameter id="CCD_L" type="uint" value="6" />
|
||||
<parameter id="WTR_S" type="uint" value="3" />
|
||||
<parameter id="WTR_L" type="uint" value="9" />
|
||||
<parameter id="DQSCK" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="8" />
|
||||
<parameter id="XPDLL" type="uint" value="325" />
|
||||
<parameter id="XS" type="uint" value="324" />
|
||||
<parameter id="XSDLL" type="uint" value="512" />
|
||||
<parameter id="CKE" type="uint" value="6" />
|
||||
<parameter id="CKESR" type="uint" value="7" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="60.75" />
|
||||
<parameter id="idd02" type="double" value="4.05" />
|
||||
<parameter id="idd2p0" type="double" value="17.0" />
|
||||
<parameter id="idd2p1" type="double" value="17.0" />
|
||||
<parameter id="idd2n" type="double" value="38.25" />
|
||||
<parameter id="idd3p0" type="double" value="22.5" />
|
||||
<parameter id="idd3p1" type="double" value="22.5" />
|
||||
<parameter id="idd3n" type="double" value="44.0" />
|
||||
<parameter id="idd4r" type="double" value="184.5" />
|
||||
<parameter id="idd4w" type="double" value="168.75" />
|
||||
<parameter id="idd5" type="double" value="118.0" />
|
||||
<parameter id="idd6" type="double" value="20.25" />
|
||||
<parameter id="idd62" type="double" value="2.6" />
|
||||
<parameter id="vdd" type="double" value="1.2" />
|
||||
<parameter id="vdd2" type="double" value="2.5" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,67 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_4Gb_LPDDR3-1333_32bit_A" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="32" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="667" />
|
||||
<parameter id="REFI" type="uint" value="2600" />
|
||||
<parameter id="RFC" type="uint" value="87" />
|
||||
<parameter id="RL" type="uint" value="10" />
|
||||
<parameter id="WL" type="uint" value="8" />
|
||||
<parameter id="CL" type="uint" value="10" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="12" />
|
||||
<parameter id="RAS" type="uint" value="30" />
|
||||
<parameter id="RCD" type="uint" value="12" />
|
||||
<parameter id="RC" type="uint" value="40" />
|
||||
<parameter id="FAW" type="uint" value="40" />
|
||||
<parameter id="RRD" type="uint" value="8" />
|
||||
<parameter id="RTP" type="uint" value="8" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="8" />
|
||||
<parameter id="DQSCK" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="6" />
|
||||
<parameter id="XPDLL" type="uint" value="6" />
|
||||
<parameter id="XS" type="uint" value="94" />
|
||||
<parameter id="XSDLL" type="uint" value="94" />
|
||||
<parameter id="CKE" type="uint" value="6" />
|
||||
<parameter id="CKESR" type="uint" value="12" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="15.0" />
|
||||
<parameter id="idd02" type="double" value="78.0" />
|
||||
<parameter id="idd2p0" type="double" value="0.6" />
|
||||
<parameter id="idd2p02" type="double" value="0.87" />
|
||||
<parameter id="idd2p1" type="double" value="0.6" />
|
||||
<parameter id="idd2p12" type="double" value="0.87" />
|
||||
<parameter id="idd2n" type="double" value="2.0" />
|
||||
<parameter id="idd2n2" type="double" value="36.0" />
|
||||
<parameter id="idd3p0" type="double" value="1.2" />
|
||||
<parameter id="idd3p02" type="double" value="8.15" />
|
||||
<parameter id="idd3p1" type="double" value="1.2" />
|
||||
<parameter id="idd3p12" type="double" value="8.15" />
|
||||
<parameter id="idd3n" type="double" value="2.0" />
|
||||
<parameter id="idd3n2" type="double" value="38.0" />
|
||||
<parameter id="idd4r" type="double" value="5.0" />
|
||||
<parameter id="idd4r2" type="double" value="243.0" />
|
||||
<parameter id="idd4w" type="double" value="10.0" />
|
||||
<parameter id="idd4w2" type="double" value="265.0" />
|
||||
<parameter id="idd5" type="double" value="40.0" />
|
||||
<parameter id="idd52" type="double" value="158.0" />
|
||||
<parameter id="idd6" type="double" value="1.0" />
|
||||
<parameter id="idd62" type="double" value="3.27" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,67 @@
|
||||
<!DOCTYPE memspec SYSTEM "memspec.dtd">
|
||||
<memspec>
|
||||
|
||||
<parameter id="memoryId" type="string" value="MICRON_4Gb_LPDDR3-1600_32bit_A" />
|
||||
<parameter id="memoryType" type="string" value="LPDDR3" />
|
||||
<memarchitecturespec>
|
||||
<parameter id="width" type="uint" value="32" />
|
||||
<parameter id="nbrOfBanks" type="uint" value="8" />
|
||||
<parameter id="nbrOfRanks" type="uint" value="1" />
|
||||
<parameter id="nbrOfColumns" type="uint" value="1024" />
|
||||
<parameter id="nbrOfRows" type="uint" value="16384" />
|
||||
<parameter id="dataRate" type="uint" value="2" />
|
||||
<parameter id="burstLength" type="uint" value="8" />
|
||||
</memarchitecturespec>
|
||||
<memtimingspec>
|
||||
<parameter id="clkMhz" type="double" value="800" />
|
||||
<parameter id="REFI" type="uint" value="3120" />
|
||||
<parameter id="RFC" type="uint" value="104" />
|
||||
<parameter id="RL" type="uint" value="12" />
|
||||
<parameter id="WL" type="uint" value="9" />
|
||||
<parameter id="CL" type="uint" value="12" />
|
||||
<parameter id="AL" type="uint" value="0" />
|
||||
<parameter id="RP" type="uint" value="15" />
|
||||
<parameter id="RAS" type="uint" value="36" />
|
||||
<parameter id="RCD" type="uint" value="15" />
|
||||
<parameter id="RC" type="uint" value="48" />
|
||||
<parameter id="FAW" type="uint" value="40" />
|
||||
<parameter id="RRD" type="uint" value="8" />
|
||||
<parameter id="RTP" type="uint" value="8" />
|
||||
<parameter id="WR" type="uint" value="12" />
|
||||
<parameter id="CCD" type="uint" value="4" />
|
||||
<parameter id="WTR" type="uint" value="8" />
|
||||
<parameter id="DQSCK" type="uint" value="2" />
|
||||
<parameter id="XP" type="uint" value="6" />
|
||||
<parameter id="XPDLL" type="uint" value="6" />
|
||||
<parameter id="XS" type="uint" value="112" />
|
||||
<parameter id="XSDLL" type="uint" value="112" />
|
||||
<parameter id="CKE" type="uint" value="6" />
|
||||
<parameter id="CKESR" type="uint" value="12" />
|
||||
</memtimingspec>
|
||||
<mempowerspec>
|
||||
<parameter id="idd0" type="double" value="15.0" />
|
||||
<parameter id="idd02" type="double" value="80.0" />
|
||||
<parameter id="idd2p0" type="double" value="0.6" />
|
||||
<parameter id="idd2p02" type="double" value="0.87" />
|
||||
<parameter id="idd2p1" type="double" value="0.6" />
|
||||
<parameter id="idd2p12" type="double" value="0.87" />
|
||||
<parameter id="idd2n" type="double" value="2.0" />
|
||||
<parameter id="idd2n2" type="double" value="38.0" />
|
||||
<parameter id="idd3p0" type="double" value="1.2" />
|
||||
<parameter id="idd3p02" type="double" value="8.15" />
|
||||
<parameter id="idd3p1" type="double" value="1.2" />
|
||||
<parameter id="idd3p12" type="double" value="8.15" />
|
||||
<parameter id="idd3n" type="double" value="2.0" />
|
||||
<parameter id="idd3n2" type="double" value="45.0" />
|
||||
<parameter id="idd4r" type="double" value="5.0" />
|
||||
<parameter id="idd4r2" type="double" value="260.0" />
|
||||
<parameter id="idd4w" type="double" value="10.0" />
|
||||
<parameter id="idd4w2" type="double" value="284.0" />
|
||||
<parameter id="idd5" type="double" value="40.0" />
|
||||
<parameter id="idd52" type="double" value="160.0" />
|
||||
<parameter id="idd6" type="double" value="1.0" />
|
||||
<parameter id="idd62" type="double" value="3.27" />
|
||||
<parameter id="vdd" type="double" value="1.8" />
|
||||
<parameter id="vdd2" type="double" value="1.2" />
|
||||
</mempowerspec>
|
||||
</memspec>
|
||||
@@ -0,0 +1,13 @@
|
||||
<!ELEMENT memspec (parameter*,memarchitecturespec,memtimingspec,mempowerspec)>
|
||||
|
||||
<!ELEMENT parameter EMPTY>
|
||||
<!ATTLIST parameter id CDATA #REQUIRED>
|
||||
<!ATTLIST parameter type CDATA #REQUIRED>
|
||||
<!ATTLIST parameter value CDATA #REQUIRED>
|
||||
<!ATTLIST parameter unit CDATA #IMPLIED>
|
||||
|
||||
<!ELEMENT memarchitecturespec (parameter*)>
|
||||
|
||||
<!ELEMENT memtimingspec (parameter*)>
|
||||
|
||||
<!ELEMENT mempowerspec (parameter*)>
|
||||
26
dram/resources/simulations/sim-batch.xml
Normal file
26
dram/resources/simulations/sim-batch.xml
Normal file
@@ -0,0 +1,26 @@
|
||||
<simulation id="matzesWideIO">
|
||||
<memspec>MatzesWideIO.xml</memspec>
|
||||
<addressmapping>am_wideio.xml</addressmapping>
|
||||
<memconfigs>
|
||||
<memconfig>fr_fcfs.xml</memconfig>
|
||||
<memconfig>fr_fcfs_bankwise.xml</memconfig>
|
||||
</memconfigs>
|
||||
<trace-setups>
|
||||
<trace-setup id="1">
|
||||
<device >mediabench-adpcmencode_32.stl</device>
|
||||
</trace-setup>
|
||||
</trace-setups>
|
||||
</simulation>
|
||||
<simulation id="matzesWideIO2">
|
||||
<memspec>MatzesWideIO.xml</memspec>
|
||||
<addressmapping>am_wideio.xml</addressmapping>
|
||||
<memconfigs>
|
||||
<memconfig>fr_fcfs.xml</memconfig>
|
||||
<memconfig>fr_fcfs_bankwise.xml</memconfig>
|
||||
</memconfigs>
|
||||
<trace-setups>
|
||||
<trace-setup id="1">
|
||||
<device >mediabench-adpcmencode_32.stl</device>
|
||||
</trace-setup>
|
||||
</trace-setups>
|
||||
</simulation>
|
||||
@@ -48,9 +48,10 @@ private:
|
||||
deque<tlm_generic_payload* > backpressure;
|
||||
|
||||
|
||||
// Initiated by schedulerWrapper
|
||||
// Initiated by dram
|
||||
tlm_sync_enum nb_transport_bw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& bwDelay)
|
||||
{
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase, bwDelay + sc_time_stamp());
|
||||
payloadEventQueue.notify(payload, phase, bwDelay);
|
||||
return TLM_ACCEPTED;
|
||||
}
|
||||
|
||||
@@ -175,20 +175,19 @@ public:
|
||||
else
|
||||
{
|
||||
Bank bank = DramExtension::getExtension(payload).getBank();
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp());
|
||||
sendToDram(payload, phase, SC_ZERO_TIME);
|
||||
|
||||
if (isIn(phase, { BEGIN_RD, BEGIN_WR, BEGIN_ACT, BEGIN_PRE, BEGIN_PRE_ALL, BEGIN_RDA, BEGIN_WRA, BEGIN_AUTO_REFRESH }))
|
||||
{
|
||||
sendToDram(payload, phase, SC_ZERO_TIME);
|
||||
if (phase == BEGIN_RD || phase == BEGIN_WR)
|
||||
scheduleNextPayload(bank);
|
||||
else if (phase == BEGIN_AUTO_REFRESH)
|
||||
printDebugMessage("Entering auto refresh on bank " + to_string(bank.ID()));
|
||||
}
|
||||
if (phase == BEGIN_RD || phase == BEGIN_WR)
|
||||
scheduleNextPayload(bank);
|
||||
else if (phase == BEGIN_AUTO_REFRESH)
|
||||
printDebugMessage("Entering auto refresh on bank " + to_string(bank.ID()));
|
||||
else if (isIn(phase, { BEGIN_PDNA, BEGIN_PDNP, BEGIN_SREF }))
|
||||
printDebugMessage("Entering PowerDown " + phaseNameToString(phase) + " on bank " + to_string(bank.ID()));
|
||||
else if (isIn(phase, { END_PDNA, END_PDNP, END_SREF }))
|
||||
printDebugMessage("Leaving PowerDown " + phaseNameToString(phase) + " on bank " + to_string(bank.ID()));
|
||||
else if (isIn(phase, { BEGIN_RD, BEGIN_WR, BEGIN_ACT, BEGIN_PRE, BEGIN_PRE_ALL, BEGIN_RDA, BEGIN_WRA }))
|
||||
{
|
||||
}
|
||||
else
|
||||
SC_REPORT_FATAL(0, "refreshTriggerPEQCallback queue in controller wrapper was triggered with unsupported phase");
|
||||
}
|
||||
@@ -210,37 +209,18 @@ private:
|
||||
// --- FRONTEND INTERACTION ------
|
||||
tlm_sync_enum nb_transport_fw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& fwDelay)
|
||||
{
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp());
|
||||
|
||||
if (phase == BEGIN_REQ)
|
||||
{
|
||||
payload.acquire();
|
||||
payloadEntersSystem(payload);
|
||||
|
||||
if (getTotalNumberOfPayloadsInSystem() > controller->config.MaxNrOfTransactions)
|
||||
{
|
||||
printDebugMessage("##Backpressure: Max number of transactions in system reached");
|
||||
backpressure = &payload;
|
||||
return TLM_ACCEPTED;
|
||||
}
|
||||
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase, fwDelay + sc_time_stamp());
|
||||
frontendPEQ.notify(payload, phase,
|
||||
clkAlign(sc_time_stamp()) - sc_time_stamp() + Configuration::getInstance().Timings.clk);
|
||||
clkAlign(sc_time_stamp() + fwDelay) - (sc_time_stamp() + fwDelay) + Configuration::getInstance().Timings.clk);
|
||||
}
|
||||
else if (phase == END_RESP)
|
||||
{
|
||||
if (backpressure != NULL)
|
||||
{
|
||||
printDebugMessage("##Backpressure released");
|
||||
//already registered above
|
||||
frontendPEQ.notify(*backpressure, BEGIN_REQ, Configuration::getInstance().Timings.clk);
|
||||
backpressure = NULL;
|
||||
}
|
||||
|
||||
payloadLeavesSystem(payload);
|
||||
payload.release();
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase,
|
||||
fwDelay + sc_time_stamp() + Configuration::getInstance().Timings.clk);
|
||||
frontendPEQ.notify(payload, phase, clkAlign(sc_time_stamp() + fwDelay) - (sc_time_stamp() + fwDelay));
|
||||
}
|
||||
|
||||
return TLM_ACCEPTED;
|
||||
}
|
||||
|
||||
@@ -248,11 +228,32 @@ private:
|
||||
{
|
||||
if (phase == BEGIN_REQ)
|
||||
{
|
||||
payload.acquire();
|
||||
payloadEntersSystem(payload);
|
||||
if (getTotalNumberOfPayloadsInSystem() > controller->config.MaxNrOfTransactions)
|
||||
{
|
||||
printDebugMessage("##Backpressure: Max number of transactions in system reached");
|
||||
backpressure = &payload;
|
||||
return;
|
||||
}
|
||||
payload.set_response_status(tlm::TLM_OK_RESPONSE);
|
||||
sendToFrontend(payload, END_REQ, SC_ZERO_TIME);
|
||||
scheduler->schedule(&payload);
|
||||
scheduleNextPayload(DramExtension::getExtension(payload).getBank());
|
||||
payload.set_response_status(tlm::TLM_OK_RESPONSE);
|
||||
TlmRecorder::getInstance().recordPhase(payload, END_REQ, sc_time_stamp());
|
||||
sendToFrontend(payload, END_REQ, SC_ZERO_TIME);
|
||||
}
|
||||
else if (phase == END_RESP)
|
||||
{
|
||||
if (backpressure != NULL)
|
||||
{
|
||||
printDebugMessage("##Backpressure released");
|
||||
backpressure->set_response_status(tlm::TLM_OK_RESPONSE);
|
||||
sendToFrontend(*backpressure, END_REQ, SC_ZERO_TIME);
|
||||
scheduler->schedule(backpressure);
|
||||
scheduleNextPayload(DramExtension::getExtension(backpressure).getBank());
|
||||
backpressure = NULL;
|
||||
}
|
||||
payloadLeavesSystem(payload);
|
||||
payload.release();
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -332,16 +333,15 @@ private:
|
||||
tlm_sync_enum nb_transport_bw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& bwDelay)
|
||||
{
|
||||
dramPEQ.notify(payload, phase, bwDelay);
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase, bwDelay + sc_time_stamp());
|
||||
return TLM_ACCEPTED;
|
||||
}
|
||||
|
||||
void dramPEQCallback(tlm_generic_payload& payload, const tlm_phase& phase)
|
||||
{
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp());
|
||||
Bank bank = DramExtension::getExtension(payload).getBank();
|
||||
printDebugMessage("Received " + phaseNameToString(phase) + " from DRAM");
|
||||
|
||||
|
||||
if (phase == BEGIN_RD || phase == BEGIN_WR)
|
||||
{
|
||||
scheduleNextPayload(bank);
|
||||
@@ -349,14 +349,10 @@ private:
|
||||
}
|
||||
else if (phase == END_RD || phase == END_WR)
|
||||
{
|
||||
TlmRecorder::getInstance().recordPhase(payload, BEGIN_RESP, sc_time_stamp());
|
||||
TlmRecorder::getInstance().recordPhase(payload, END_RESP, sc_time_stamp());
|
||||
sendToFrontend(payload, BEGIN_RESP, SC_ZERO_TIME);
|
||||
}
|
||||
else if (phase == END_RDA || phase == END_WRA)
|
||||
{
|
||||
TlmRecorder::getInstance().recordPhase(payload, BEGIN_RESP, sc_time_stamp());
|
||||
TlmRecorder::getInstance().recordPhase(payload, END_RESP, sc_time_stamp());
|
||||
sendToFrontend(payload, BEGIN_RESP, SC_ZERO_TIME);
|
||||
scheduleNextPayload(bank);
|
||||
}
|
||||
|
||||
@@ -8,7 +8,6 @@
|
||||
#ifndef DRAM_H_
|
||||
#define DRAM_H_
|
||||
|
||||
|
||||
#include <tlm.h>
|
||||
#include <systemc.h>
|
||||
#include <tlm_utils/peq_with_cb_and_phase.h>
|
||||
@@ -17,20 +16,22 @@
|
||||
#include "../core/TimingCalculation.h"
|
||||
#include "../common/protocol.h"
|
||||
#include "../common/Utils.h"
|
||||
#include "../common/TlmRecorder.h"
|
||||
|
||||
using namespace std;
|
||||
using namespace tlm;
|
||||
using namespace core;
|
||||
|
||||
template <unsigned int BUSWIDTH = 128, unsigned int WORDS = 4096, bool STORE = true, bool FIXED_BL = false, unsigned int FIXED_BL_VALUE = 0>
|
||||
template<unsigned int BUSWIDTH = 128, unsigned int WORDS = 4096, bool STORE = true, bool FIXED_BL = false,
|
||||
unsigned int FIXED_BL_VALUE = 0>
|
||||
struct Dram: sc_module
|
||||
{
|
||||
tlm_utils::simple_target_socket<Dram, BUSWIDTH, tlm::tlm_base_protocol_types> tSocket;
|
||||
tlm_utils::peq_with_cb_and_phase<Dram> controllePEQ;
|
||||
|
||||
SC_CTOR(Dram) : tSocket("socket") ,controllePEQ(this, &Dram::controllerPEQCallback)
|
||||
{
|
||||
tSocket.register_nb_transport_fw(this, &Dram::nb_transport_fw);
|
||||
SC_CTOR(Dram) :
|
||||
tSocket("socket")
|
||||
{
|
||||
tSocket.register_nb_transport_fw(this, &Dram::nb_transport_fw);
|
||||
}
|
||||
|
||||
~Dram()
|
||||
@@ -38,69 +39,65 @@ struct Dram: sc_module
|
||||
|
||||
}
|
||||
|
||||
virtual tlm::tlm_sync_enum nb_transport_fw( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_time& delay )
|
||||
virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& payload, tlm::tlm_phase& phase, sc_time& delay)
|
||||
{
|
||||
controllePEQ.notify(trans, phase, delay);
|
||||
return tlm::TLM_ACCEPTED;
|
||||
}
|
||||
TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp() + delay);
|
||||
|
||||
void controllerPEQCallback(tlm::tlm_generic_payload& payload, const tlm::tlm_phase& phase)
|
||||
{
|
||||
if(phase == BEGIN_PRE)
|
||||
if (phase == BEGIN_PRE)
|
||||
{
|
||||
sendToController(payload, END_PRE, getExecutionTime(Command::Precharge, payload));
|
||||
sendToController(payload, END_PRE, delay + getExecutionTime(Command::Precharge, payload));
|
||||
}
|
||||
else if (phase == BEGIN_PRE_ALL)
|
||||
{
|
||||
sendToController(payload, END_PRE_ALL, getExecutionTime(Command::PrechargeAll, payload));
|
||||
sendToController(payload, END_PRE_ALL,delay + getExecutionTime(Command::PrechargeAll, payload));
|
||||
}
|
||||
else if(phase == BEGIN_ACT)
|
||||
else if (phase == BEGIN_ACT)
|
||||
{
|
||||
sendToController(payload, END_ACT, getExecutionTime(Command::Activate, payload));
|
||||
sendToController(payload, END_ACT, delay + getExecutionTime(Command::Activate, payload));
|
||||
}
|
||||
else if(phase == BEGIN_WR)
|
||||
else if (phase == BEGIN_WR)
|
||||
{
|
||||
sendToController(payload, END_WR, getExecutionTime(Command::Write, payload));
|
||||
sendToController(payload, END_WR, delay + getExecutionTime(Command::Write, payload));
|
||||
}
|
||||
else if(phase == BEGIN_RD)
|
||||
else if (phase == BEGIN_RD)
|
||||
{
|
||||
sendToController(payload, END_RD, getExecutionTime(Command::Read, payload));
|
||||
sendToController(payload, END_RD, delay + getExecutionTime(Command::Read, payload));
|
||||
}
|
||||
else if(phase == BEGIN_WRA)
|
||||
else if (phase == BEGIN_WRA)
|
||||
{
|
||||
sendToController(payload, END_WRA, getExecutionTime(Command::WriteA, payload));
|
||||
sendToController(payload, END_WRA, delay + getExecutionTime(Command::WriteA, payload));
|
||||
}
|
||||
else if(phase == BEGIN_RDA)
|
||||
else if (phase == BEGIN_RDA)
|
||||
{
|
||||
sendToController(payload, END_RDA, getExecutionTime(Command::ReadA, payload));
|
||||
sendToController(payload, END_RDA, delay + getExecutionTime(Command::ReadA, payload));
|
||||
}
|
||||
else if(phase == BEGIN_AUTO_REFRESH)
|
||||
else if (phase == BEGIN_AUTO_REFRESH)
|
||||
{
|
||||
sendToController(payload, END_AUTO_REFRESH, getExecutionTime(Command::AutoRefresh, payload));
|
||||
sendToController(payload, END_AUTO_REFRESH, delay + getExecutionTime(Command::AutoRefresh, payload));
|
||||
}
|
||||
|
||||
//Powerdown phases have to be started and ended by the controller, because they do not have a fixed length
|
||||
else if(phase == BEGIN_PDNP)
|
||||
else if (phase == BEGIN_PDNP)
|
||||
{
|
||||
|
||||
}
|
||||
else if(phase == END_PDNP)
|
||||
else if (phase == END_PDNP)
|
||||
{
|
||||
|
||||
}
|
||||
else if(phase == BEGIN_PDNA)
|
||||
else if (phase == BEGIN_PDNA)
|
||||
{
|
||||
|
||||
}
|
||||
else if(phase == END_PDNA)
|
||||
else if (phase == END_PDNA)
|
||||
{
|
||||
|
||||
}
|
||||
else if(phase == BEGIN_SREF)
|
||||
else if (phase == BEGIN_SREF)
|
||||
{
|
||||
|
||||
}
|
||||
else if(phase == END_SREF)
|
||||
else if (phase == END_SREF)
|
||||
{
|
||||
|
||||
}
|
||||
@@ -108,9 +105,9 @@ struct Dram: sc_module
|
||||
{
|
||||
SC_REPORT_FATAL("DRAM", "DRAM PEQ was called with unknown phase");
|
||||
}
|
||||
return tlm::TLM_ACCEPTED;
|
||||
}
|
||||
|
||||
|
||||
void sendToController(tlm_generic_payload& payload, const tlm_phase& phase, const sc_time& delay)
|
||||
{
|
||||
tlm_phase TPhase = phase;
|
||||
@@ -125,8 +122,4 @@ struct Dram: sc_module
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* DRAM_H_ */
|
||||
|
||||
@@ -15,7 +15,7 @@ using namespace simulation;
|
||||
namespace simulation {
|
||||
|
||||
SimulationManager::SimulationManager(string resources) :
|
||||
resources(resources)
|
||||
resources(resources), silent(false)
|
||||
{
|
||||
}
|
||||
|
||||
@@ -23,56 +23,79 @@ SimulationManager::~SimulationManager()
|
||||
{
|
||||
}
|
||||
|
||||
void SimulationManager::loadSimulationFromXML(string uri)
|
||||
void SimulationManager::loadSimulationsFromXML(string uri)
|
||||
{
|
||||
cout << "\n\nLoad Simulation-Batch:"<<endl;
|
||||
cout << headline<< endl;
|
||||
cout << "\t-> load simulation from .."<<endl;
|
||||
cout << "\n\nLoad Simulation-Batchs:" << endl;
|
||||
cout << headline << endl;
|
||||
cout << "\t-> load simulations .." << endl;
|
||||
|
||||
exportPath = getFileName(uri);
|
||||
XMLDocument doc;
|
||||
loadXML(uri, doc);
|
||||
|
||||
cout << "\t-> parsing simulation object .."<<endl;
|
||||
simulationName = getFileName(uri);
|
||||
parseXML(doc);
|
||||
cout << "\t-> parsing simulation objects .." << endl;
|
||||
|
||||
cout << "\t-> checking paths .."<<endl;
|
||||
|
||||
for (XMLElement* element = doc.FirstChildElement("simulation"); element != NULL;
|
||||
element = element->NextSiblingElement("simulation"))
|
||||
{
|
||||
parseSimulationBatch(element);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
cout << "\t-> checking paths .." << endl;
|
||||
checkPaths();
|
||||
|
||||
cout << "\t-> simulation loaded successfully!\n"<<endl;
|
||||
printSimulationBatch();
|
||||
cout << "\t-> simulation batches loaded successfully!\n" << endl;
|
||||
|
||||
for (auto batch : simulationsBatches)
|
||||
{
|
||||
batch.print();
|
||||
}
|
||||
}
|
||||
|
||||
void SimulationManager::runSimulations()
|
||||
{
|
||||
system(string("mkdir -p " + simulationName).c_str());
|
||||
|
||||
for (auto& dramSetup : dramSetups)
|
||||
system(string("rm -rf " + exportPath).c_str());
|
||||
for (auto& batch : simulationsBatches)
|
||||
{
|
||||
string memconfig = getFileName(dramSetup.memconfig);
|
||||
for (auto& traceSetup : traceSetups)
|
||||
system(string("mkdir -p " + exportPath + "/"+batch.simulationName).c_str());
|
||||
|
||||
for (auto& dramSetup : batch.dramSetups)
|
||||
{
|
||||
runSimulation(simulationName + "/" + memconfig + "-" + traceSetup.first + ".tdb", dramSetup, traceSetup.second);
|
||||
string memconfig = getFileName(dramSetup.memconfig);
|
||||
for (auto& traceSetup : batch.traceSetups)
|
||||
{
|
||||
runSimulation(exportPath + "/" + batch.simulationName + "/" + memconfig + "-" + traceSetup.first + ".tdb",
|
||||
dramSetup, traceSetup.second);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void SimulationManager::parseXML(XMLDocument& doc)
|
||||
void SimulationManager::parseSimulationBatch(XMLElement* simulation)
|
||||
{
|
||||
XMLElement* simulation = doc.FirstChildElement("simulation");
|
||||
SimulationBatch batch;
|
||||
|
||||
batch.simulationName = simulation->Attribute("id");
|
||||
string memspecUri = simulation->FirstChildElement("memspec")->GetText();
|
||||
string addressmappingUri = simulation->FirstChildElement("addressmapping")->GetText();
|
||||
|
||||
for (XMLElement* element = simulation->FirstChildElement("memconfigs")->FirstChildElement("memconfig"); element != NULL;
|
||||
element = element->NextSiblingElement("memconfig"))
|
||||
{
|
||||
dramSetups.push_back(DramSetup(element->GetText(), memspecUri, addressmappingUri));
|
||||
batch.dramSetups.push_back(DramSetup(element->GetText(), memspecUri, addressmappingUri));
|
||||
}
|
||||
|
||||
for (XMLElement* element = simulation->FirstChildElement("trace-setups")->FirstChildElement("trace-setup"); element != NULL;
|
||||
element = element->NextSiblingElement("trace-setup"))
|
||||
{
|
||||
addTraceSetup(element);
|
||||
addTraceSetup(batch, element);
|
||||
}
|
||||
|
||||
simulationsBatches.push_back(batch);
|
||||
}
|
||||
|
||||
void SimulationManager::checkPaths()
|
||||
@@ -98,32 +121,39 @@ void SimulationManager::runSimulation(string traceName, DramSetup dramSetup, vec
|
||||
void SimulationManager::startTraceAnalyzer()
|
||||
{
|
||||
string p = getenv("trace");
|
||||
string run_tpr = p + " -f " + simulationName + "&";
|
||||
string run_tpr = p + " -f ";
|
||||
for(auto batch : simulationsBatches)
|
||||
{
|
||||
run_tpr += exportPath + "/" + batch.simulationName + " ";
|
||||
|
||||
}
|
||||
run_tpr += "&";
|
||||
system(run_tpr.c_str());
|
||||
}
|
||||
|
||||
void SimulationManager::addTraceSetup(tinyxml2::XMLElement* element)
|
||||
void SimulationManager::addTraceSetup(SimulationBatch& batch, tinyxml2::XMLElement* element)
|
||||
{
|
||||
vector<Device> devices;
|
||||
for (XMLElement* device = element->FirstChildElement("device"); device != NULL; device = device->NextSiblingElement("device"))
|
||||
{
|
||||
devices.push_back(Device(device->GetText(), device->IntAttribute("bl")));
|
||||
}
|
||||
while(devices.size()<Simulation::NumberOfTracePlayers)
|
||||
while (devices.size() < Simulation::NumberOfTracePlayers)
|
||||
{
|
||||
devices.push_back(Device());
|
||||
}
|
||||
traceSetups.emplace(element->Attribute("id"), devices);
|
||||
|
||||
batch.traceSetups.emplace(element->Attribute("id"), devices);
|
||||
}
|
||||
|
||||
void SimulationManager::report(string message)
|
||||
{
|
||||
//DebugManager::getInstance().printDebugMessage("Simulation Manager", message);
|
||||
//if (DebugManager::getInstance().writeToConsole == false)
|
||||
cout << message << endl;
|
||||
cout << message << endl;
|
||||
}
|
||||
|
||||
void SimulationManager::printSimulationBatch()
|
||||
void SimulationBatch::print()
|
||||
{
|
||||
for (DramSetup& s : dramSetups)
|
||||
{
|
||||
|
||||
@@ -16,29 +16,37 @@
|
||||
|
||||
namespace simulation {
|
||||
|
||||
struct SimulationBatch
|
||||
{
|
||||
std::string simulationName;
|
||||
|
||||
std::vector<simulation::DramSetup> dramSetups;
|
||||
std::map<std::string, std::vector<Device>> traceSetups;
|
||||
void print();
|
||||
};
|
||||
|
||||
class SimulationManager
|
||||
{
|
||||
public:
|
||||
SimulationManager(std::string resources);
|
||||
~SimulationManager();
|
||||
|
||||
void loadSimulationFromXML(std::string uri);
|
||||
void loadSimulationsFromXML(std::string uri);
|
||||
|
||||
void runSimulations();
|
||||
void startTraceAnalyzer();
|
||||
|
||||
bool silent = false;
|
||||
bool silent;
|
||||
private:
|
||||
std::string simulationName;
|
||||
|
||||
std::vector<simulation::DramSetup> dramSetups;
|
||||
std::map<std::string, std::vector<Device>> traceSetups;
|
||||
std::string resources;
|
||||
std::string exportPath;
|
||||
|
||||
std::vector<SimulationBatch> simulationsBatches;
|
||||
|
||||
void runSimulation(std::string traceName, DramSetup dramSetup, std::vector<Device> traceSetup);
|
||||
void addTraceSetup(tinyxml2::XMLElement* element);
|
||||
void parseXML(tinyxml2::XMLDocument& doc);
|
||||
void parseSimulationBatch(tinyxml2::XMLElement* simulation);
|
||||
void addTraceSetup(SimulationBatch& batch, tinyxml2::XMLElement* element);
|
||||
void checkPaths();
|
||||
void printSimulationBatch();
|
||||
|
||||
void report(std::string message);
|
||||
};
|
||||
|
||||
@@ -35,11 +35,11 @@ int sc_main(int argc, char **argv)
|
||||
{
|
||||
sc_set_time_resolution(1, SC_PS);
|
||||
resources = pathOfFile(argv[0]) + string("/../resources/");
|
||||
string simulationToRun = "first.xml";
|
||||
string simulationToRun = "sim-batch.xml";
|
||||
|
||||
SimulationManager manager(resources);
|
||||
manager.loadSimulationFromXML(resources + "/simulations/" + simulationToRun);
|
||||
manager.silent = true;
|
||||
manager.loadSimulationsFromXML(resources + "/simulations/" + simulationToRun);
|
||||
manager.silent = false;
|
||||
manager.runSimulations();
|
||||
manager.startTraceAnalyzer();
|
||||
|
||||
|
||||
Reference in New Issue
Block a user