diff --git a/dram/.settings/language.settings.xml b/dram/.settings/language.settings.xml index 26f9f756..d60268a9 100644 --- a/dram/.settings/language.settings.xml +++ b/dram/.settings/language.settings.xml @@ -4,7 +4,7 @@ - + @@ -14,7 +14,7 @@ - + diff --git a/dram/resources/configs/memconfigs/fr_fcfs.xml b/dram/resources/configs/memconfigs/fr_fcfs.xml index ba84ec9e..55831e10 100644 --- a/dram/resources/configs/memconfigs/fr_fcfs.xml +++ b/dram/resources/configs/memconfigs/fr_fcfs.xml @@ -4,7 +4,7 @@ - + diff --git a/dram/resources/configs/memconfigs/fr_fcfs_bankwise.xml b/dram/resources/configs/memconfigs/fr_fcfs_bankwise.xml index 48daa1e8..d2b21316 100644 --- a/dram/resources/configs/memconfigs/fr_fcfs_bankwise.xml +++ b/dram/resources/configs/memconfigs/fr_fcfs_bankwise.xml @@ -4,7 +4,7 @@ - + diff --git a/dram/resources/configs/memconfigs/memconfig.xml b/dram/resources/configs/memconfigs/memconfig.xml index 708e9b97..7ace3024 100644 --- a/dram/resources/configs/memconfigs/memconfig.xml +++ b/dram/resources/configs/memconfigs/memconfig.xml @@ -4,7 +4,7 @@ - + diff --git a/dram/resources/configs/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml b/dram/resources/configs/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml index 47b11458..0832dc3e 100644 --- a/dram/resources/configs/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml +++ b/dram/resources/configs/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml @@ -1,5 +1,6 @@ + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml new file mode 100644 index 00000000..0832dc3e --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/JEDEC_256Mb_WIDEIO_SDR-200_128bit.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/JEDEC_256Mb_WIDEIO_SDR-266_128bit.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/JEDEC_256Mb_WIDEIO_SDR-266_128bit.xml new file mode 100644 index 00000000..5c416e0d --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/JEDEC_256Mb_WIDEIO_SDR-266_128bit.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.xml new file mode 100644 index 00000000..1a58dbd7 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR2-800_16bit_H.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR2-800_16bit_H.xml new file mode 100644 index 00000000..a5ba9cc3 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR2-800_16bit_H.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G.xml new file mode 100644 index 00000000..bbf85fda --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_2s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_2s.xml new file mode 100644 index 00000000..0fd307ee --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_2s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_3s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_3s.xml new file mode 100644 index 00000000..5d6f85c4 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_3s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_mu.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_mu.xml new file mode 100644 index 00000000..18db3b33 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_mu.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G.xml new file mode 100644 index 00000000..8e1ce348 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_2s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_2s.xml new file mode 100644 index 00000000..ce6d7de0 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_2s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_3s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_3s.xml new file mode 100644 index 00000000..616da5b5 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_3s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_mu.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_mu.xml new file mode 100644 index 00000000..018b75b5 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_mu.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml new file mode 100644 index 00000000..052f6773 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_2s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_2s.xml new file mode 100644 index 00000000..be3627c2 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_2s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_3s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_3s.xml new file mode 100644 index 00000000..2f7e3fc9 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_3s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_mu.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_mu.xml new file mode 100644 index 00000000..14ec62e6 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_mu.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.xml new file mode 100644 index 00000000..2545f2c1 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1066_64bit_G_UDIMM.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1066_64bit_G_UDIMM.xml new file mode 100644 index 00000000..be78c1cb --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1066_64bit_G_UDIMM.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1333_64bit_D_SODIMM.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1333_64bit_D_SODIMM.xml new file mode 100644 index 00000000..0ed1dd8e --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2GB_DDR3-1333_64bit_D_SODIMM.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_mu.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_mu.xml new file mode 100644 index 00000000..8f60dd9d --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_mu.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D.xml new file mode 100644 index 00000000..ce8f92cf --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_2s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_2s.xml new file mode 100644 index 00000000..70093b4b --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_2s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_3s.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_3s.xml new file mode 100644 index 00000000..a866e7c9 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_3s.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_mu.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_mu.xml new file mode 100644 index 00000000..9cda2f25 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_mu.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR-266_16bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR-266_16bit_A.xml new file mode 100644 index 00000000..657cf37c --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR-266_16bit_A.xml @@ -0,0 +1,54 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR-333_16bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR-333_16bit_A.xml new file mode 100644 index 00000000..5a7d5c7e --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR-333_16bit_A.xml @@ -0,0 +1,54 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR2-1066-S4_16bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR2-1066-S4_16bit_A.xml new file mode 100644 index 00000000..7a4fb08b --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR2-1066-S4_16bit_A.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR2-800-S4_16bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR2-800-S4_16bit_A.xml new file mode 100644 index 00000000..fc5a9da1 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_2Gb_LPDDR2-800-S4_16bit_A.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.xml new file mode 100644 index 00000000..857a5113 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.xml @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.xml new file mode 100644 index 00000000..1eabf24f --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.xml @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.xml new file mode 100644 index 00000000..19780c3a --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.xml b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.xml new file mode 100644 index 00000000..e71930e1 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/dram-power-original/memspecs/memspec.dtd b/dram/resources/configs/memspecs/dram-power-original/memspecs/memspec.dtd new file mode 100644 index 00000000..f94ed9e9 --- /dev/null +++ b/dram/resources/configs/memspecs/dram-power-original/memspecs/memspec.dtd @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/dram/resources/simulations/sim-batch.xml b/dram/resources/simulations/sim-batch.xml new file mode 100644 index 00000000..0df37abc --- /dev/null +++ b/dram/resources/simulations/sim-batch.xml @@ -0,0 +1,26 @@ + + MatzesWideIO.xml + am_wideio.xml + + fr_fcfs.xml + fr_fcfs_bankwise.xml + + + + mediabench-adpcmencode_32.stl + + + + + MatzesWideIO.xml + am_wideio.xml + + fr_fcfs.xml + fr_fcfs_bankwise.xml + + + + mediabench-adpcmencode_32.stl + + + diff --git a/dram/src/simulation/Arbiter.h b/dram/src/simulation/Arbiter.h index cfc3a4bf..b1c9b069 100644 --- a/dram/src/simulation/Arbiter.h +++ b/dram/src/simulation/Arbiter.h @@ -48,9 +48,10 @@ private: deque backpressure; - // Initiated by schedulerWrapper + // Initiated by dram tlm_sync_enum nb_transport_bw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& bwDelay) { + TlmRecorder::getInstance().recordPhase(payload, phase, bwDelay + sc_time_stamp()); payloadEventQueue.notify(payload, phase, bwDelay); return TLM_ACCEPTED; } diff --git a/dram/src/simulation/Controller.h b/dram/src/simulation/Controller.h index 50fb4ba2..93da1a68 100644 --- a/dram/src/simulation/Controller.h +++ b/dram/src/simulation/Controller.h @@ -175,20 +175,19 @@ public: else { Bank bank = DramExtension::getExtension(payload).getBank(); - TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp()); + sendToDram(payload, phase, SC_ZERO_TIME); - if (isIn(phase, { BEGIN_RD, BEGIN_WR, BEGIN_ACT, BEGIN_PRE, BEGIN_PRE_ALL, BEGIN_RDA, BEGIN_WRA, BEGIN_AUTO_REFRESH })) - { - sendToDram(payload, phase, SC_ZERO_TIME); - if (phase == BEGIN_RD || phase == BEGIN_WR) - scheduleNextPayload(bank); - else if (phase == BEGIN_AUTO_REFRESH) - printDebugMessage("Entering auto refresh on bank " + to_string(bank.ID())); - } + if (phase == BEGIN_RD || phase == BEGIN_WR) + scheduleNextPayload(bank); + else if (phase == BEGIN_AUTO_REFRESH) + printDebugMessage("Entering auto refresh on bank " + to_string(bank.ID())); else if (isIn(phase, { BEGIN_PDNA, BEGIN_PDNP, BEGIN_SREF })) printDebugMessage("Entering PowerDown " + phaseNameToString(phase) + " on bank " + to_string(bank.ID())); else if (isIn(phase, { END_PDNA, END_PDNP, END_SREF })) printDebugMessage("Leaving PowerDown " + phaseNameToString(phase) + " on bank " + to_string(bank.ID())); + else if (isIn(phase, { BEGIN_RD, BEGIN_WR, BEGIN_ACT, BEGIN_PRE, BEGIN_PRE_ALL, BEGIN_RDA, BEGIN_WRA })) + { + } else SC_REPORT_FATAL(0, "refreshTriggerPEQCallback queue in controller wrapper was triggered with unsupported phase"); } @@ -210,37 +209,18 @@ private: // --- FRONTEND INTERACTION ------ tlm_sync_enum nb_transport_fw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& fwDelay) { - TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp()); - if (phase == BEGIN_REQ) { - payload.acquire(); - payloadEntersSystem(payload); - - if (getTotalNumberOfPayloadsInSystem() > controller->config.MaxNrOfTransactions) - { - printDebugMessage("##Backpressure: Max number of transactions in system reached"); - backpressure = &payload; - return TLM_ACCEPTED; - } - + TlmRecorder::getInstance().recordPhase(payload, phase, fwDelay + sc_time_stamp()); frontendPEQ.notify(payload, phase, - clkAlign(sc_time_stamp()) - sc_time_stamp() + Configuration::getInstance().Timings.clk); + clkAlign(sc_time_stamp() + fwDelay) - (sc_time_stamp() + fwDelay) + Configuration::getInstance().Timings.clk); } else if (phase == END_RESP) { - if (backpressure != NULL) - { - printDebugMessage("##Backpressure released"); - //already registered above - frontendPEQ.notify(*backpressure, BEGIN_REQ, Configuration::getInstance().Timings.clk); - backpressure = NULL; - } - - payloadLeavesSystem(payload); - payload.release(); + TlmRecorder::getInstance().recordPhase(payload, phase, + fwDelay + sc_time_stamp() + Configuration::getInstance().Timings.clk); + frontendPEQ.notify(payload, phase, clkAlign(sc_time_stamp() + fwDelay) - (sc_time_stamp() + fwDelay)); } - return TLM_ACCEPTED; } @@ -248,11 +228,32 @@ private: { if (phase == BEGIN_REQ) { + payload.acquire(); + payloadEntersSystem(payload); + if (getTotalNumberOfPayloadsInSystem() > controller->config.MaxNrOfTransactions) + { + printDebugMessage("##Backpressure: Max number of transactions in system reached"); + backpressure = &payload; + return; + } + payload.set_response_status(tlm::TLM_OK_RESPONSE); + sendToFrontend(payload, END_REQ, SC_ZERO_TIME); scheduler->schedule(&payload); scheduleNextPayload(DramExtension::getExtension(payload).getBank()); - payload.set_response_status(tlm::TLM_OK_RESPONSE); - TlmRecorder::getInstance().recordPhase(payload, END_REQ, sc_time_stamp()); - sendToFrontend(payload, END_REQ, SC_ZERO_TIME); + } + else if (phase == END_RESP) + { + if (backpressure != NULL) + { + printDebugMessage("##Backpressure released"); + backpressure->set_response_status(tlm::TLM_OK_RESPONSE); + sendToFrontend(*backpressure, END_REQ, SC_ZERO_TIME); + scheduler->schedule(backpressure); + scheduleNextPayload(DramExtension::getExtension(backpressure).getBank()); + backpressure = NULL; + } + payloadLeavesSystem(payload); + payload.release(); } else { @@ -332,16 +333,15 @@ private: tlm_sync_enum nb_transport_bw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& bwDelay) { dramPEQ.notify(payload, phase, bwDelay); + TlmRecorder::getInstance().recordPhase(payload, phase, bwDelay + sc_time_stamp()); return TLM_ACCEPTED; } void dramPEQCallback(tlm_generic_payload& payload, const tlm_phase& phase) { - TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp()); Bank bank = DramExtension::getExtension(payload).getBank(); printDebugMessage("Received " + phaseNameToString(phase) + " from DRAM"); - if (phase == BEGIN_RD || phase == BEGIN_WR) { scheduleNextPayload(bank); @@ -349,14 +349,10 @@ private: } else if (phase == END_RD || phase == END_WR) { - TlmRecorder::getInstance().recordPhase(payload, BEGIN_RESP, sc_time_stamp()); - TlmRecorder::getInstance().recordPhase(payload, END_RESP, sc_time_stamp()); sendToFrontend(payload, BEGIN_RESP, SC_ZERO_TIME); } else if (phase == END_RDA || phase == END_WRA) { - TlmRecorder::getInstance().recordPhase(payload, BEGIN_RESP, sc_time_stamp()); - TlmRecorder::getInstance().recordPhase(payload, END_RESP, sc_time_stamp()); sendToFrontend(payload, BEGIN_RESP, SC_ZERO_TIME); scheduleNextPayload(bank); } diff --git a/dram/src/simulation/Dram.h b/dram/src/simulation/Dram.h index 2473133a..f954c451 100644 --- a/dram/src/simulation/Dram.h +++ b/dram/src/simulation/Dram.h @@ -8,7 +8,6 @@ #ifndef DRAM_H_ #define DRAM_H_ - #include #include #include @@ -17,20 +16,22 @@ #include "../core/TimingCalculation.h" #include "../common/protocol.h" #include "../common/Utils.h" +#include "../common/TlmRecorder.h" using namespace std; using namespace tlm; using namespace core; -template +template struct Dram: sc_module { tlm_utils::simple_target_socket tSocket; - tlm_utils::peq_with_cb_and_phase controllePEQ; - SC_CTOR(Dram) : tSocket("socket") ,controllePEQ(this, &Dram::controllerPEQCallback) - { - tSocket.register_nb_transport_fw(this, &Dram::nb_transport_fw); + SC_CTOR(Dram) : + tSocket("socket") + { + tSocket.register_nb_transport_fw(this, &Dram::nb_transport_fw); } ~Dram() @@ -38,69 +39,65 @@ struct Dram: sc_module } - virtual tlm::tlm_sync_enum nb_transport_fw( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_time& delay ) + virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& payload, tlm::tlm_phase& phase, sc_time& delay) { - controllePEQ.notify(trans, phase, delay); - return tlm::TLM_ACCEPTED; - } + TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp() + delay); - void controllerPEQCallback(tlm::tlm_generic_payload& payload, const tlm::tlm_phase& phase) - { - if(phase == BEGIN_PRE) + if (phase == BEGIN_PRE) { - sendToController(payload, END_PRE, getExecutionTime(Command::Precharge, payload)); + sendToController(payload, END_PRE, delay + getExecutionTime(Command::Precharge, payload)); } else if (phase == BEGIN_PRE_ALL) { - sendToController(payload, END_PRE_ALL, getExecutionTime(Command::PrechargeAll, payload)); + sendToController(payload, END_PRE_ALL,delay + getExecutionTime(Command::PrechargeAll, payload)); } - else if(phase == BEGIN_ACT) + else if (phase == BEGIN_ACT) { - sendToController(payload, END_ACT, getExecutionTime(Command::Activate, payload)); + sendToController(payload, END_ACT, delay + getExecutionTime(Command::Activate, payload)); } - else if(phase == BEGIN_WR) + else if (phase == BEGIN_WR) { - sendToController(payload, END_WR, getExecutionTime(Command::Write, payload)); + sendToController(payload, END_WR, delay + getExecutionTime(Command::Write, payload)); } - else if(phase == BEGIN_RD) + else if (phase == BEGIN_RD) { - sendToController(payload, END_RD, getExecutionTime(Command::Read, payload)); + sendToController(payload, END_RD, delay + getExecutionTime(Command::Read, payload)); } - else if(phase == BEGIN_WRA) + else if (phase == BEGIN_WRA) { - sendToController(payload, END_WRA, getExecutionTime(Command::WriteA, payload)); + sendToController(payload, END_WRA, delay + getExecutionTime(Command::WriteA, payload)); } - else if(phase == BEGIN_RDA) + else if (phase == BEGIN_RDA) { - sendToController(payload, END_RDA, getExecutionTime(Command::ReadA, payload)); + sendToController(payload, END_RDA, delay + getExecutionTime(Command::ReadA, payload)); } - else if(phase == BEGIN_AUTO_REFRESH) + else if (phase == BEGIN_AUTO_REFRESH) { - sendToController(payload, END_AUTO_REFRESH, getExecutionTime(Command::AutoRefresh, payload)); + sendToController(payload, END_AUTO_REFRESH, delay + getExecutionTime(Command::AutoRefresh, payload)); } //Powerdown phases have to be started and ended by the controller, because they do not have a fixed length - else if(phase == BEGIN_PDNP) + else if (phase == BEGIN_PDNP) { } - else if(phase == END_PDNP) + else if (phase == END_PDNP) { } - else if(phase == BEGIN_PDNA) + else if (phase == BEGIN_PDNA) { } - else if(phase == END_PDNA) + else if (phase == END_PDNA) { } - else if(phase == BEGIN_SREF) + else if (phase == BEGIN_SREF) { } - else if(phase == END_SREF) + else if (phase == END_SREF) { } @@ -108,9 +105,9 @@ struct Dram: sc_module { SC_REPORT_FATAL("DRAM", "DRAM PEQ was called with unknown phase"); } + return tlm::TLM_ACCEPTED; } - void sendToController(tlm_generic_payload& payload, const tlm_phase& phase, const sc_time& delay) { tlm_phase TPhase = phase; @@ -125,8 +122,4 @@ struct Dram: sc_module }; - - - - #endif /* DRAM_H_ */ diff --git a/dram/src/simulation/SimulationManager.cpp b/dram/src/simulation/SimulationManager.cpp index 9599bf95..c5b33140 100644 --- a/dram/src/simulation/SimulationManager.cpp +++ b/dram/src/simulation/SimulationManager.cpp @@ -15,7 +15,7 @@ using namespace simulation; namespace simulation { SimulationManager::SimulationManager(string resources) : - resources(resources) + resources(resources), silent(false) { } @@ -23,56 +23,79 @@ SimulationManager::~SimulationManager() { } -void SimulationManager::loadSimulationFromXML(string uri) +void SimulationManager::loadSimulationsFromXML(string uri) { - cout << "\n\nLoad Simulation-Batch:"< load simulation from .."< load simulations .." << endl; + + exportPath = getFileName(uri); XMLDocument doc; loadXML(uri, doc); - cout << "\t-> parsing simulation object .."< parsing simulation objects .." << endl; - cout << "\t-> checking paths .."<NextSiblingElement("simulation")) + { + parseSimulationBatch(element); + } + + + + + cout << "\t-> checking paths .." << endl; checkPaths(); - cout << "\t-> simulation loaded successfully!\n"< simulation batches loaded successfully!\n" << endl; + + for (auto batch : simulationsBatches) + { + batch.print(); + } } void SimulationManager::runSimulations() { - system(string("mkdir -p " + simulationName).c_str()); - - for (auto& dramSetup : dramSetups) + system(string("rm -rf " + exportPath).c_str()); + for (auto& batch : simulationsBatches) { - string memconfig = getFileName(dramSetup.memconfig); - for (auto& traceSetup : traceSetups) + system(string("mkdir -p " + exportPath + "/"+batch.simulationName).c_str()); + + for (auto& dramSetup : batch.dramSetups) { - runSimulation(simulationName + "/" + memconfig + "-" + traceSetup.first + ".tdb", dramSetup, traceSetup.second); + string memconfig = getFileName(dramSetup.memconfig); + for (auto& traceSetup : batch.traceSetups) + { + runSimulation(exportPath + "/" + batch.simulationName + "/" + memconfig + "-" + traceSetup.first + ".tdb", + dramSetup, traceSetup.second); + } } } } -void SimulationManager::parseXML(XMLDocument& doc) +void SimulationManager::parseSimulationBatch(XMLElement* simulation) { - XMLElement* simulation = doc.FirstChildElement("simulation"); + SimulationBatch batch; + + batch.simulationName = simulation->Attribute("id"); string memspecUri = simulation->FirstChildElement("memspec")->GetText(); string addressmappingUri = simulation->FirstChildElement("addressmapping")->GetText(); for (XMLElement* element = simulation->FirstChildElement("memconfigs")->FirstChildElement("memconfig"); element != NULL; element = element->NextSiblingElement("memconfig")) { - dramSetups.push_back(DramSetup(element->GetText(), memspecUri, addressmappingUri)); + batch.dramSetups.push_back(DramSetup(element->GetText(), memspecUri, addressmappingUri)); } for (XMLElement* element = simulation->FirstChildElement("trace-setups")->FirstChildElement("trace-setup"); element != NULL; element = element->NextSiblingElement("trace-setup")) { - addTraceSetup(element); + addTraceSetup(batch, element); } + + simulationsBatches.push_back(batch); } void SimulationManager::checkPaths() @@ -98,32 +121,39 @@ void SimulationManager::runSimulation(string traceName, DramSetup dramSetup, vec void SimulationManager::startTraceAnalyzer() { string p = getenv("trace"); - string run_tpr = p + " -f " + simulationName + "&"; + string run_tpr = p + " -f "; + for(auto batch : simulationsBatches) + { + run_tpr += exportPath + "/" + batch.simulationName + " "; + + } + run_tpr += "&"; system(run_tpr.c_str()); } -void SimulationManager::addTraceSetup(tinyxml2::XMLElement* element) +void SimulationManager::addTraceSetup(SimulationBatch& batch, tinyxml2::XMLElement* element) { vector devices; for (XMLElement* device = element->FirstChildElement("device"); device != NULL; device = device->NextSiblingElement("device")) { devices.push_back(Device(device->GetText(), device->IntAttribute("bl"))); } - while(devices.size()Attribute("id"), devices); + + batch.traceSetups.emplace(element->Attribute("id"), devices); } void SimulationManager::report(string message) { //DebugManager::getInstance().printDebugMessage("Simulation Manager", message); //if (DebugManager::getInstance().writeToConsole == false) - cout << message << endl; + cout << message << endl; } -void SimulationManager::printSimulationBatch() +void SimulationBatch::print() { for (DramSetup& s : dramSetups) { diff --git a/dram/src/simulation/SimulationManager.h b/dram/src/simulation/SimulationManager.h index 185c4bf9..8e3f5707 100644 --- a/dram/src/simulation/SimulationManager.h +++ b/dram/src/simulation/SimulationManager.h @@ -16,29 +16,37 @@ namespace simulation { +struct SimulationBatch +{ + std::string simulationName; + + std::vector dramSetups; + std::map> traceSetups; + void print(); +}; + class SimulationManager { public: SimulationManager(std::string resources); ~SimulationManager(); - void loadSimulationFromXML(std::string uri); + void loadSimulationsFromXML(std::string uri); + void runSimulations(); void startTraceAnalyzer(); - bool silent = false; + bool silent; private: - std::string simulationName; - - std::vector dramSetups; - std::map> traceSetups; std::string resources; + std::string exportPath; + + std::vector simulationsBatches; void runSimulation(std::string traceName, DramSetup dramSetup, std::vector traceSetup); - void addTraceSetup(tinyxml2::XMLElement* element); - void parseXML(tinyxml2::XMLDocument& doc); + void parseSimulationBatch(tinyxml2::XMLElement* simulation); + void addTraceSetup(SimulationBatch& batch, tinyxml2::XMLElement* element); void checkPaths(); - void printSimulationBatch(); void report(std::string message); }; diff --git a/dram/src/simulation/main.cpp b/dram/src/simulation/main.cpp index 822db596..00ae479d 100644 --- a/dram/src/simulation/main.cpp +++ b/dram/src/simulation/main.cpp @@ -35,11 +35,11 @@ int sc_main(int argc, char **argv) { sc_set_time_resolution(1, SC_PS); resources = pathOfFile(argv[0]) + string("/../resources/"); - string simulationToRun = "first.xml"; + string simulationToRun = "sim-batch.xml"; SimulationManager manager(resources); - manager.loadSimulationFromXML(resources + "/simulations/" + simulationToRun); - manager.silent = true; + manager.loadSimulationsFromXML(resources + "/simulations/" + simulationToRun); + manager.silent = false; manager.runSimulations(); manager.startTraceAnalyzer();