Added Corrected Documentation

documentation/Makefile

@@ -22,6 +22,6 @@ figures/%.pdf: figures/%.svg
 
 ## Other Targets
 clean:
-	rm -f $(IMGS) *.aux *.log *.dvi soc.pdf *.ps *.pyg *.toc *.loc *.lot *.out *.lof *.lol *.synctex.gz
+	rm -f $(IMGS) *.aux *.log *.dvi *.pdf *.ps *.pyg *.toc *.loc *.lot *.out *.lof *.lol *.synctex.gz
 
 .PHONY: all clean

documentation/architecture.tex

@@ -102,8 +102,23 @@ constant pc_num : reg_number := to_reg_number(15);
 Registers \inlineasm{r0} to \inlineasm{r11} can be used without special consideration as general purpose registers.
 Registers \inlineasm{r12} (stack pointer) and \inlineasm{r13} (link register) can also be used as general purpose register but are additionally altered with special instructions.
 \subsection{Stack Pointer}
-The stackpointer (\inlineasm{r12}) is used when jumping into or out of interrupt handlers (i.e. external interrupts or \inlineasm{trap} instructions and \inlineasm{reti}).
-It must be set to the correct address of the stack, before any interrupt occurs.
+The stack pointer (\inlineasm{r12}) is used when jumping into or out of interrupt handlers (i.e. external interrupts or \inlineasm{trap} instructions and \inlineasm{reti}).
+It must be set to the correct address of the stack, before any interrupt is allowed to occur.
+In the default configuration, stack grows downwards.
+The stack pointer should be word-aligned at all times.
+
+The interpretation of the stack pointer is always 'The current stack pointer points to the topmost element on the stack'.
+When interfacing the stack pointer manually, always adhere to the following rules:
+\begin{itemize}
+\nolistskip
+\item When writing to the stack (push), always decrement the stack before writing your element.
+\item When reading from the stack (pop), read your element, then decrement the stack pointer.
+\end{itemize}
+Only when adhering to these rules the integrity of the stack can be ensured.
+
+The initial stack pointer position does not need to be a memory address,
+but the word address below it needs to be valid.
+
 \subsection{Link Register}
 The link register (\inlineasm{r13}) is set by the \inlineasm{call} instruction.
 This allows for flexible function returns using the pseudo instruction \inlineasm{ret} (a branch to the link register).

documentation/instructionset.tex

@@ -355,5 +355,5 @@ If 32bit instruction should be implemented, follow the structure of the 16bit de
 
 \subsection{Multicycle Instructions}
 To implement multicycle operations, changes need to be implemented in \filename{decoder$\_$fsm.vhd}.
-Use the implementation of reti as an example.
+Use the implementation of \textit{reti} as an example.
 

documentation/interrupts.tex

@@ -68,3 +68,12 @@ Note, that an arbitrary time (and number of instructions) may take place between
 	\caption{Signal Pattern for Trap Instruction}
 	\label{fig:signal_irq_trap}
 \end{figure}
+
+\subsection{Processor Interrupt Behavior}
+\label{sec:InterruptEntryCPU}
+When an interrupt is accepted by the processor, it saves the current PC and status register on the stack.
+Then it replaces the runtime priority in the status register with interrupt's priority and replaces the PC with the interupt vector number.
+
+The \textit{reti} instruction reverses this and resturn to the previous executed program.
+Note that the processor by itself does not save any registers apart from status register and program counter.
+Any other register that needs to be preserved needs to be saved manually.