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gem5/src/mem
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Hoa Nguyen 0fefc76fe6 mem-cache: Fix unit inconsistencies in base cache stats 
Most latency stats are described to have Cycle unit in the comments.
However, most of them are calculated from Tick.

Also, the unit of `demandAvgMissLatency` is incorrect.

Change-Id: Ib1b9b7c6fa4404cecb3982b3799753df19774623
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56989
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-02-27 23:01:03 +00:00
..
cache
mem-cache: Fix unit inconsistencies in base cache stats
2022-02-27 23:01:03 +00:00
probes
scons: Add sim_object and enums arguments to SimObject().
2021-12-08 08:01:23 +00:00
protocol
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
qos
scons: Add sim_object and enums arguments to SimObject().
2021-12-08 08:01:23 +00:00
ruby
mem-ruby: Revert 7018c2b34
2022-02-26 15:19:51 +00:00
slicc
misc: Generate StateMachine debug includes in deterministic order
2022-01-05 10:15:55 +00:00
abstract_mem.cc
arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
2021-09-28 19:56:01 +00:00
abstract_mem.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
AbstractMemory.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
addr_mapper.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
addr_mapper.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
AddrMapper.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
backdoor.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
bridge.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
bridge.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
Bridge.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
cfi_mem.cc
mem: Fix for CFI memory
2021-09-20 08:00:53 +00:00
cfi_mem.hh
mem: Fix for CFI memory
2021-09-20 08:00:53 +00:00
CfiMemory.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
coherent_xbar.cc
misc: Replace the GEM5_VAR_USED macro with [[maybe_unused]].
2021-07-29 10:17:51 +00:00
coherent_xbar.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
comm_monitor.cc
misc: Remove sim/cur_tick dependency from sim/core.hh
2021-07-06 09:59:11 +00:00
comm_monitor.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
CommMonitor.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
DRAMInterface.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
drampower.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
drampower.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
dramsim2_wrapper.cc
misc: Replace the GEM5_VAR_USED macro with [[maybe_unused]].
2021-07-29 10:17:51 +00:00
dramsim2_wrapper.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
dramsim2.cc
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
dramsim2.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
dramsim3_wrapper.cc
misc: Replace the GEM5_VAR_USED macro with [[maybe_unused]].
2021-07-29 10:17:51 +00:00
dramsim3_wrapper.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
dramsim3.cc
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
dramsim3.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
DRAMsim3.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
DRAMSim2.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
external_master.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
external_master.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
external_slave.cc
misc: Replace the GEM5_VAR_USED macro with [[maybe_unused]].
2021-07-29 10:17:51 +00:00
external_slave.hh
mem: Stop using SlavePort as a base class.
2021-10-13 20:28:05 +00:00
ExternalMaster.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
ExternalSlave.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
hmc_controller.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
hmc_controller.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
HMCController.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
htm.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
htm.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mem_checker_monitor.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mem_checker_monitor.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mem_checker.cc
mem,sim: Replace the deprecated chatty_assert with gem5_assert.
2021-08-21 00:54:54 +00:00
mem_checker.hh
misc: Remove sim/cur_tick dependency from sim/core.hh
2021-07-06 09:59:11 +00:00
mem_ctrl.cc
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
mem_ctrl.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
mem_delay.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mem_delay.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mem_interface.cc
mem: Initialize all stats in MemInterface
2021-11-06 18:25:43 +00:00
mem_interface.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
mem_requestor.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
MemChecker.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
MemCtrl.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
MemDelay.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
MemInterface.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
multi_level_page_table.hh
misc: Move MemPool based calls to the SEWorkload.
2021-09-21 02:05:32 +00:00
noncoherent_xbar.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
noncoherent_xbar.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
NVMInterface.py
mem: Add 'controller()' function to NVMInterface.py
2021-12-30 03:03:15 +00:00
packet_access.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
packet_queue.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
packet_queue.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
packet.cc
misc: Use the new bufval helpers in RegClass and Packet.
2022-02-26 09:56:26 +00:00
packet.hh
mem: implement x86 locked accesses in timing-mode classic cache
2022-01-17 15:15:24 +00:00
page_table.cc
mem: Add a translation generator function to EmulationPageTable.
2021-10-22 21:43:02 +00:00
page_table.hh
mem: Add a translation generator function to EmulationPageTable.
2021-10-22 21:43:02 +00:00
physical.cc
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
physical.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
port_proxy.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
port_proxy.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
port_terminator.cc
mem: Adding PortTerminator
2021-10-28 20:13:41 +00:00
port_terminator.hh
mem: Adding PortTerminator
2021-10-28 20:13:41 +00:00
port.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
port.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
PortTerminator.py
mem: Adding PortTerminator
2021-10-28 20:13:41 +00:00
qport.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
request.hh
x86,mem: Replace the x86 StoreCheck flag with READ_MODIFY_WRITE.
2021-09-05 05:29:27 +00:00
SConscript
scons: Add sim_object and enums arguments to SimObject().
2021-12-08 08:01:23 +00:00
SConsopts
scons: Explicitly add librt to scons
2021-07-07 21:37:15 +00:00
se_translating_port_proxy.cc
mem: Use the MMU's translation generator in translating proxies.
2021-10-22 21:43:02 +00:00
se_translating_port_proxy.hh
mem: Use the MMU's translation generator in translating proxies.
2021-10-22 21:43:02 +00:00
serial_link.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
serial_link.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
SerialLink.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
simple_mem.cc
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
simple_mem.hh
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
SimpleMemory.py
mem: Adopt a memory namespace for memories
2021-07-09 11:24:10 +00:00
snoop_filter.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
snoop_filter.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
stack_dist_calc.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
stack_dist_calc.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
token_port.cc
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
token_port.hh
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
tport.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
tport.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
translating_port_proxy.cc
mem: Use the MMU's translation generator in translating proxies.
2021-10-22 21:43:02 +00:00
translating_port_proxy.hh
mem: Use the MMU's translation generator in translating proxies.
2021-10-22 21:43:02 +00:00
translation_gen.hh
mem: Add a translation gen helper class.
2021-10-14 20:49:23 +00:00
translation_gen.test.cc
ext: upgrade to googletest 1.11.x
2022-01-20 01:16:02 +00:00
xbar.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
xbar.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
XBar.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00