Andreas Sandberg e80899c49a arch-arm: Add support for the brk instruction ...

Add support for software breakpoints as signalled by the aarch64 brk
instruction. This introduces a new SoftwareBreakpoint fault.

Change-Id: I93646c3298e09d7f7b0983108ba8937c7331297a
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5721
Reviewed-by: Giacomo Gabrielli <Giacomo.Gabrielli@arm.com>

2017-11-22 16:12:38 +00:00

..

freebsd

arm: Remove unused DumpStatsPCEventF class in FreeBSD system

2017-05-12 09:21:41 +00:00

insts

arch-arm: Fix MCR/MRC disassemble

2017-11-21 14:25:56 +00:00

isa

arch-arm: Add support for the brk instruction

2017-11-22 16:12:38 +00:00

kvm

kvm: arm: Get rid of functions which just wrap the subclasses version.

2017-09-20 17:55:09 +00:00

linux

arm,sim: fix context switch stats dumps for ARM64/Linux

2017-06-22 13:32:04 +00:00

ArmInterrupts.py

sim: Include object header files in SWIG interfaces

2012-11-02 11:32:01 -05:00

ArmISA.py

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

ArmNativeTrace.py

cpu: Put all CPU instruction tracers in a single file

2015-01-25 07:22:17 -05:00

ArmPMU.py

arch-arm: ArmPMU refactor

2017-11-21 17:09:18 +00:00

ArmSystem.py

sim: Implement load_addr_mask auto-calculation

2017-11-17 10:54:24 +00:00

ArmTLB.py

arm: Add support for memory-mapped m5ops

2017-05-09 10:09:58 +00:00

ccregs.hh

arm: use condition code registers for ARM ISA

2014-04-29 16:05:02 -05:00

decoder.cc

isa: Add parameter to pick different decoder inside ISA

2015-10-09 14:50:54 -05:00

decoder.hh

isa: Add parameter to pick different decoder inside ISA

2015-10-09 14:50:54 -05:00

faults.cc

arch-arm: Add support for the brk instruction

2017-11-22 16:12:38 +00:00

faults.hh

arch-arm: Add support for the brk instruction

2017-11-22 16:12:38 +00:00

interrupts.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

interrupts.hh

arm: Fix secure state checking in various places

2016-08-02 10:38:02 +01:00

intregs.hh

arm: ISA X31 destination register fix

2014-09-03 07:42:43 -04:00

isa_device.cc

arch, arm: Print value being ignored on DummyISA write

2017-11-16 16:14:51 +00:00

isa_device.hh

misc: Remove redundant compiler-specific defines

2015-10-12 04:07:59 -04:00

isa_traits.hh

arch: Cleanup unused ISA traits constants

2014-09-03 07:42:21 -04:00

isa.cc

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

isa.hh

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

kernel_stats.hh

stats: Get rid of some kernel stats related cruft.

2017-09-11 04:58:38 +00:00

locked_mem.hh

mem: Signal the local monitor when clearing the global monitor

2017-10-13 08:41:08 +00:00

microcode_rom.hh

arm: include missing file for arm

2009-04-21 15:40:26 -07:00

miscregs.cc

arch-arm: Allow dc ivac from EL0 when SCTLR_EL1.UCI=1

2017-11-09 20:48:25 +00:00

miscregs.hh

arm: Don't panic when checking coprocessor read/write permissions

2017-04-03 16:39:47 +00:00

mmapped_ipr.hh

arch: Add support for m5ops using mmapped IPRs

2013-09-30 12:20:43 +02:00

nativetrace.cc

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

nativetrace.hh

ARM: Add vfpv3 support to native trace.

2011-05-04 20:38:26 -05:00

pagetable.hh

arm: Mark uninitialized new TLB entries as not valid

2016-06-20 15:51:31 +01:00

pmu.cc

arch-arm: ArmPMU refactor

2017-11-21 17:09:18 +00:00

pmu.hh

arch-arm: ArmPMU refactor

2017-11-21 17:09:18 +00:00

process.cc

syscall-emul: Move memState into its own file

2017-03-09 19:19:38 +00:00

process.hh

syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead

2016-11-09 14:27:40 -06:00

pseudo_inst.hh

kvm, x86: Adding support for SE mode execution

2014-11-23 18:01:08 -08:00

registers.hh

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

remote_gdb.cc

arch-arm: Fix inverted 32/64-bit check in GDB

2017-10-17 08:35:23 +00:00

remote_gdb.hh

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

SConscript

scons: Stop generating inc.d in the isa parser.

2017-10-17 18:57:50 +00:00

SConsopts

arm: add ARM support to M5

2009-04-05 18:53:15 -07:00

stacktrace.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

stacktrace.hh

arch: Use const StaticInstPtr references where possible

2014-09-27 09:08:36 -04:00

stage2_lookup.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

stage2_lookup.hh

sim: Move the BaseTLB to src/arch/generic/

2015-02-11 10:23:27 -05:00

stage2_mmu.cc

sim: Decouple draining from the SimObject hierarchy

2015-07-07 09:51:05 +01:00

stage2_mmu.hh

sim: Decouple draining from the SimObject hierarchy

2015-07-07 09:51:05 +01:00

system.cc

arm: Add support for memory-mapped m5ops

2017-05-09 10:09:58 +00:00

system.hh

arm: Add support for memory-mapped m5ops

2017-05-09 10:09:58 +00:00

table_walker.cc

arm: Replace EventWrapper use with EventFunctionWrapper

2017-06-20 18:03:21 +00:00

table_walker.hh

arm: Replace EventWrapper use with EventFunctionWrapper

2017-06-20 18:03:21 +00:00

tlb.cc

arm: Add support for memory-mapped m5ops

2017-05-09 10:09:58 +00:00

tlb.hh

arm: Add support for memory-mapped m5ops

2017-05-09 10:09:58 +00:00

types.hh

arch-arm: Add support for the brk instruction

2017-11-22 16:12:38 +00:00

utility.cc

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

utility.hh

arm: Fix trapping to Hypervisor during MSR/MRS read/write

2016-08-02 10:38:03 +01:00

vtophys.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

vtophys.hh

gcc: Clean-up of non-C++0x compliant code, first steps

2012-03-19 06:36:09 -04:00