arch-arm: ArmPMU refactor
Change the definition of PMU events in order to integrate events not cannot easily be represented by probe points. The software increment event is now defined as a special type with its separate implementation in pmu.cc and pmu.hh. Change-Id: I43874b9641bf38c54f6ba2c26386542b6a73e282 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5764 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Jose Marinho
committed by
Andreas Sandberg
Andreas Sandberg
parent
69ac4aced0
commit
4bb053c3d2
@@ -43,38 +43,61 @@ from m5.params import *
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from m5.params import isNullPointer
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from m5.proxy import *
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class ProbeEvent(object):
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def __init__(self, pmu, _eventId, obj, *listOfNames):
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self.obj = obj
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self.names = listOfNames
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self.eventId = _eventId
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self.pmu = pmu
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def register(self):
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if self.obj:
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for name in self.names:
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self.pmu.getCCObject().addEventProbe(self.eventId,
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self.obj.getCCObject(), name)
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class SoftwareIncrement(object):
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def __init__(self,pmu, _eventId):
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self.eventId = _eventId
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self.pmu = pmu
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def register(self):
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self.pmu.getCCObject().addSoftwareIncrementEvent(self.eventId)
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ARCH_EVENT_CORE_CYCLES = 0x11
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class ArmPMU(SimObject):
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type = 'ArmPMU'
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cxx_class = 'ArmISA::PMU'
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cxx_header = 'arch/arm/pmu.hh'
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cxx_exports = [
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PyBindMethod("addEventProbe"),
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PyBindMethod("addSoftwareIncrementEvent"),
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]
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# To prevent cycles in the configuration hierarchy, we don't keep
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# a list of supported events as a configuration param. Instead, we
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# keep them in a local list and register them using the
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# addEventProbe interface when other SimObjects register their
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# probe listeners.
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_deferred_event_types = []
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_events = None
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def addEvent(self, newObject):
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if not (isinstance(newObject, ProbeEvent)
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or isinstance(newObject, SoftwareIncrement)):
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raise TypeError("argument must be of ProbeEvent or "
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"SoftwareIncrement type")
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if not self._events:
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self._events = []
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self._events.append(newObject)
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# Override the normal SimObject::regProbeListeners method and
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# register deferred event handlers.
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def regProbeListeners(self):
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for event_id, obj, name in self._deferred_event_types:
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self.getCCObject().addEventProbe(event_id, obj.getCCObject(), name)
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for event in self._events:
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event.register()
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self.getCCObject().regProbeListeners()
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def addEventProbe(self, event_id, obj, *args):
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"""Add a probe-based event to the PMU if obj is not None."""
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if obj is None:
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return
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for name in args:
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self._deferred_event_types.append((event_id, obj, name))
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def addArchEvents(self,
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cpu=None,
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itb=None, dtb=None,
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@@ -95,25 +118,28 @@ class ArmPMU(SimObject):
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bpred = cpu.branchPred if cpu and not isNullPointer(cpu.branchPred) \
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else None
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self.addEvent(SoftwareIncrement(self,0x00))
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# 0x01: L1I_CACHE_REFILL
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self.addEventProbe(0x02, itb, "Refills")
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self.addEvent(ProbeEvent(self,0x02, itb, "Refills"))
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# 0x03: L1D_CACHE_REFILL
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# 0x04: L1D_CACHE
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self.addEventProbe(0x05, dtb, "Refills")
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self.addEventProbe(0x06, cpu, "RetiredLoads")
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self.addEventProbe(0x07, cpu, "RetiredStores")
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self.addEventProbe(0x08, cpu, "RetiredInsts")
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self.addEvent(ProbeEvent(self,0x05, dtb, "Refills"))
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self.addEvent(ProbeEvent(self,0x06, cpu, "RetiredLoads"))
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self.addEvent(ProbeEvent(self,0x07, cpu, "RetiredStores"))
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self.addEvent(ProbeEvent(self,0x08, cpu, "RetiredInsts"))
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# 0x09: EXC_TAKEN
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# 0x0A: EXC_RETURN
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# 0x0B: CID_WRITE_RETIRED
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self.addEventProbe(0x0C, cpu, "RetiredBranches")
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self.addEvent(ProbeEvent(self,0x0C, cpu, "RetiredBranches"))
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# 0x0D: BR_IMMED_RETIRED
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# 0x0E: BR_RETURN_RETIRED
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# 0x0F: UNALIGEND_LDST_RETIRED
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self.addEventProbe(0x10, bpred, "Misses")
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self.addEventProbe(0x11, cpu, "ActiveCycles")
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self.addEventProbe(0x12, bpred, "Branches")
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self.addEventProbe(0x13, cpu, "RetiredLoads", "RetiredStores")
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self.addEvent(ProbeEvent(self,0x10, bpred, "Misses"))
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self.addEvent(ProbeEvent(self, ARCH_EVENT_CORE_CYCLES, cpu,
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"ActiveCycles"))
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self.addEvent(ProbeEvent(self,0x12, bpred, "Branches"))
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self.addEvent(ProbeEvent(self,0x13, cpu, "RetiredLoads",
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"RetiredStores"))
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# 0x14: L1I_CACHE
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# 0x15: L1D_CACHE_WB
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# 0x16: L2D_CACHE
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@@ -144,6 +170,7 @@ class ArmPMU(SimObject):
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# 0x2F: L2D_TLB
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# 0x30: L2I_TLB
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cycleEventId = Param.Int(ARCH_EVENT_CORE_CYCLES, "Cycle event id")
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platform = Param.Platform(Parent.any, "Platform this device is part of.")
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eventCounters = Param.Int(31, "Number of supported PMU counters")
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pmuInterrupt = Param.Int(68, "PMU GIC interrupt number")
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@@ -37,6 +37,7 @@
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* Authors: Dam Sunwoo
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* Matt Horsnell
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* Andreas Sandberg
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* Jose Marinho
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*/
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#include "arch/arm/pmu.hh"
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@@ -48,6 +49,7 @@
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#include "debug/Checkpoint.hh"
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#include "debug/PMUVerbose.hh"
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#include "dev/arm/base_gic.hh"
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#include "dev/arm/generic_timer.hh"
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#include "dev/arm/realview.hh"
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#include "params/ArmPMU.hh"
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@@ -61,16 +63,19 @@ PMU::PMU(const ArmPMUParams *p)
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reg_pmselr(0), reg_pminten(0), reg_pmovsr(0),
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reg_pmceid0(0),reg_pmceid1(0),
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clock_remainder(0),
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counters(p->eventCounters),
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maximumCounterCount(p->eventCounters),
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cycleCounter(*this, maximumCounterCount),
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cycleCounterEventId(p->cycleEventId),
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swIncrementEvent(nullptr),
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reg_pmcr_conf(0),
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pmuInterrupt(p->pmuInterrupt),
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platform(p->platform)
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{
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DPRINTF(PMUVerbose, "Initializing the PMU.\n");
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if (p->eventCounters > 31) {
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if (maximumCounterCount > 31) {
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fatal("The PMU can only accept 31 counters, %d counters requested.\n",
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p->eventCounters);
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maximumCounterCount);
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}
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/* Setup the performance counter ID registers */
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@@ -87,13 +92,57 @@ PMU::~PMU()
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{
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}
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void
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PMU::addSoftwareIncrementEvent(unsigned int id)
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{
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auto old_event = eventMap.find(id);
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DPRINTF(PMUVerbose, "PMU: Adding SW increment event with id '0x%x'\n", id);
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if (swIncrementEvent) {
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fatal_if(old_event == eventMap.end() ||
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old_event->second != swIncrementEvent,
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"Trying to add a software increment event with multiple"
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"IDs. This is not supported.\n");
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return;
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}
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fatal_if(old_event != eventMap.end(), "An event with id %d has "
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"been previously defined\n", id);
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swIncrementEvent = new SWIncrementEvent();
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eventMap[id] = swIncrementEvent;
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registerEvent(id);
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}
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void
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PMU::addEventProbe(unsigned int id, SimObject *obj, const char *probe_name)
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{
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DPRINTF(PMUVerbose, "PMU: Adding event type '0x%x' as probe %s:%s\n",
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id, obj->name(), probe_name);
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pmuEventTypes.insert(std::make_pair(id, EventType(obj, probe_name)));
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DPRINTF(PMUVerbose, "PMU: Adding Probe Driven event with id '0x%x'"
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"as probe %s:%s\n",id, obj->name(), probe_name);
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RegularEvent *event = nullptr;
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auto event_entry = eventMap.find(id);
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if (event_entry == eventMap.end()) {
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event = new RegularEvent();
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eventMap[id] = event;
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} else {
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event = dynamic_cast<RegularEvent*>(event_entry->second);
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if (!event) {
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fatal("Event with id %d is not probe driven\n", id);
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}
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}
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event->addMicroarchitectureProbe(obj, probe_name);
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registerEvent(id);
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}
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void
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PMU::registerEvent(uint32_t id)
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{
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// Flag the event as available in the corresponding PMCEID register if it
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// is an architected event.
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if (id < 0x20) {
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@@ -114,6 +163,22 @@ PMU::drainResume()
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updateAllCounters();
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}
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void
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PMU::regProbeListeners()
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{
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// at this stage all probe configurations are done
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// counters can be configured
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for (uint32_t index = 0; index < maximumCounterCount-1; index++) {
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counters.emplace_back(*this, index);
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}
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PMUEvent *event = getEvent(cycleCounterEventId);
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panic_if(!event, "core cycle event is not present\n");
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cycleCounter.enabled = true;
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cycleCounter.attach(event);
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}
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void
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PMU::setMiscReg(int misc_reg, MiscReg val)
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{
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@@ -145,18 +210,14 @@ PMU::setMiscReg(int misc_reg, MiscReg val)
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case MISCREG_PMSWINC_EL0:
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case MISCREG_PMSWINC:
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for (int i = 0; i < counters.size(); ++i) {
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CounterState &ctr(getCounter(i));
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if (ctr.enabled && (val & (1 << i))
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&& ctr.eventId == ARCH_EVENT_SW_INCR ) {
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++ctr.value;
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}
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if (swIncrementEvent) {
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swIncrementEvent->write(val);
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}
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break;
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return;
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case MISCREG_PMCCNTR_EL0:
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case MISCREG_PMCCNTR:
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cycleCounter.value = val;
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cycleCounter.setValue(val);
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return;
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case MISCREG_PMSELR_EL0:
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@@ -278,10 +339,10 @@ PMU::readMiscRegInt(int misc_reg)
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return reg_pmceid1 & 0xFFFFFFFF;
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case MISCREG_PMCCNTR_EL0:
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return cycleCounter.value;
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return cycleCounter.getValue();
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case MISCREG_PMCCNTR:
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return cycleCounter.value & 0xFFFFFFFF;
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return cycleCounter.getValue() & 0xFFFFFFFF;
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case MISCREG_PMEVTYPER0_EL0...MISCREG_PMEVTYPER5_EL0:
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return getCounterTypeRegister(misc_reg - MISCREG_PMEVTYPER0_EL0);
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@@ -295,8 +356,11 @@ PMU::readMiscRegInt(int misc_reg)
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case MISCREG_PMXEVTYPER:
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return getCounterTypeRegister(reg_pmselr.sel);
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case MISCREG_PMEVCNTR0_EL0...MISCREG_PMEVCNTR5_EL0:
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return getCounterValue(misc_reg - MISCREG_PMEVCNTR0_EL0) & 0xFFFFFFFF;
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case MISCREG_PMEVCNTR0_EL0...MISCREG_PMEVCNTR5_EL0: {
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return getCounterValue(misc_reg - MISCREG_PMEVCNTR0_EL0) &
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0xFFFFFFFF;
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}
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case MISCREG_PMXEVCNTR_EL0:
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case MISCREG_PMXEVCNTR:
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@@ -334,7 +398,7 @@ PMU::setControlReg(PMCR_t val)
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if (val.c) {
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DPRINTF(PMUVerbose, "PMU reset cycle counter to zero.\n");
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cycleCounter.value = 0;
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cycleCounter.setValue(0);
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}
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// Reset the clock remainder if divide by 64-mode is toggled.
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@@ -355,25 +419,74 @@ PMU::updateAllCounters()
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const bool enable(global_enable && (reg_pmcnten & (1 << i)));
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if (ctr.enabled != enable) {
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ctr.enabled = enable;
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updateCounter(i, ctr);
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updateCounter(ctr);
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}
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}
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const bool ccntr_enable(global_enable && (reg_pmcnten & (1 << PMCCNTR)));
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if (cycleCounter.enabled != ccntr_enable) {
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cycleCounter.enabled = ccntr_enable;
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updateCounter(PMCCNTR, cycleCounter);
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updateCounter(cycleCounter);
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}
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}
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bool
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PMU::isFiltered(const CounterState &ctr) const
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void
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PMU::PMUEvent::attachEvent(PMU::CounterState *user)
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{
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assert(isa);
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if (userCounters.empty()) {
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enable();
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}
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userCounters.insert(user);
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updateAttachedCounters();
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}
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const PMEVTYPER_t filter(ctr.filter);
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const SCR scr(isa->readMiscRegNoEffect(MISCREG_SCR));
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const CPSR cpsr(isa->readMiscRegNoEffect(MISCREG_CPSR));
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void
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PMU::PMUEvent::increment(const uint64_t val)
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{
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for (auto& counter: userCounters) {
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counter->add(val);
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}
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}
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void
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PMU::PMUEvent::detachEvent(PMU::CounterState *user)
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{
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userCounters.erase(user);
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if (userCounters.empty()) {
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disable();
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}
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}
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void
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PMU::RegularEvent::RegularProbe::notify(const uint64_t &val)
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{
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parentEvent->increment(val);
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}
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void
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PMU::RegularEvent::enable()
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{
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for (auto& subEvents: microArchitectureEventSet) {
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attachedProbePointList.emplace_back(
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new RegularProbe(this, subEvents.first, subEvents.second));
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}
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}
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void
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PMU::RegularEvent::disable()
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{
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attachedProbePointList.clear();
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}
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bool
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PMU::CounterState::isFiltered() const
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{
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assert(pmu.isa);
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const PMEVTYPER_t filter(this->filter);
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const SCR scr(pmu.isa->readMiscRegNoEffect(MISCREG_SCR));
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const CPSR cpsr(pmu.isa->readMiscRegNoEffect(MISCREG_CPSR));
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const ExceptionLevel el(opModeToEL((OperatingMode)(uint8_t)cpsr.mode));
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const bool secure(inSecureState(scr, cpsr));
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@@ -396,60 +509,69 @@ PMU::isFiltered(const CounterState &ctr) const
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}
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void
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PMU::handleEvent(CounterId id, uint64_t delta)
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PMU::CounterState::detach()
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{
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CounterState &ctr(getCounter(id));
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const bool overflowed(reg_pmovsr & (1 << id));
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if (isFiltered(ctr))
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return;
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// Handle the "count every 64 cycles" mode
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if (id == PMCCNTR && reg_pmcr.d) {
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clock_remainder += delta;
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delta = (clock_remainder >> 6);
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clock_remainder &= 63;
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}
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// Add delta and handle (new) overflows
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if (ctr.add(delta) && !overflowed) {
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DPRINTF(PMUVerbose, "PMU counter '%i' overflowed.\n", id);
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reg_pmovsr |= (1 << id);
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// Deliver a PMU interrupt if interrupt delivery is enabled
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// for this counter.
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if (reg_pminten & (1 << id))
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raiseInterrupt();
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if (sourceEvent) {
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sourceEvent->detachEvent(this);
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sourceEvent = nullptr;
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} else {
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debugCounter("detaching event not currently attached"
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" to any event\n");
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}
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}
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void
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PMU::updateCounter(CounterId id, CounterState &ctr)
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PMU::CounterState::attach(PMUEvent* event)
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{
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value = 0;
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sourceEvent = event;
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sourceEvent->attachEvent(this);
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}
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uint64_t
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PMU::CounterState::getValue() const
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{
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if (sourceEvent) {
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sourceEvent->updateAttachedCounters();
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} else {
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debugCounter("attempted to get value from a counter without"
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" an associated event\n");
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}
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return value;
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}
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void
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PMU::CounterState::setValue(uint64_t val)
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{
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value = val;
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resetValue = true;
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if (sourceEvent) {
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sourceEvent->updateAttachedCounters();
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||||
} else {
|
||||
debugCounter("attempted to set value from a counter without"
|
||||
" an associated event\n");
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
PMU::updateCounter(CounterState &ctr)
|
||||
{
|
||||
if (!ctr.enabled) {
|
||||
if (!ctr.listeners.empty()) {
|
||||
DPRINTF(PMUVerbose, "updateCounter(%i): Disabling counter\n", id);
|
||||
ctr.listeners.clear();
|
||||
}
|
||||
DPRINTF(PMUVerbose, "updateCounter(%i): Disabling counter\n",
|
||||
ctr.getCounterId());
|
||||
ctr.detach();
|
||||
|
||||
} else {
|
||||
DPRINTF(PMUVerbose, "updateCounter(%i): Enable event id 0x%x\n",
|
||||
id, ctr.eventId);
|
||||
ctr.getCounterId(), ctr.eventId);
|
||||
|
||||
// Attach all probes belonging to this event
|
||||
auto range(pmuEventTypes.equal_range(ctr.eventId));
|
||||
for (auto it = range.first; it != range.second; ++it) {
|
||||
const EventType &et(it->second);
|
||||
|
||||
DPRINTF(PMUVerbose, "\tProbe: %s:%s\n", et.obj->name(), et.name);
|
||||
ctr.listeners.emplace_back(et.create(*this, id));
|
||||
}
|
||||
|
||||
/* The SW_INCR event type is a special case which doesn't need
|
||||
* any probes since it is controlled by software and the PMU
|
||||
* itself.
|
||||
*/
|
||||
if (ctr.listeners.empty() && ctr.eventId != ARCH_EVENT_SW_INCR) {
|
||||
auto sourceEvent = eventMap.find(ctr.eventId);
|
||||
if (sourceEvent == eventMap.end()) {
|
||||
warn("Can't enable PMU counter of type '0x%x': "
|
||||
"No such event type.\n", ctr.eventId);
|
||||
} else {
|
||||
ctr.attach(sourceEvent->second);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -459,7 +581,7 @@ void
|
||||
PMU::resetEventCounts()
|
||||
{
|
||||
for (CounterState &ctr : counters)
|
||||
ctr.value = 0;
|
||||
ctr.setValue(0);
|
||||
}
|
||||
|
||||
void
|
||||
@@ -472,7 +594,7 @@ PMU::setCounterValue(CounterId id, uint64_t val)
|
||||
}
|
||||
|
||||
CounterState &ctr(getCounter(id));
|
||||
ctr.value = val;
|
||||
ctr.setValue(val);
|
||||
}
|
||||
|
||||
PMU::PMEVTYPER_t
|
||||
@@ -509,7 +631,7 @@ PMU::setCounterTypeRegister(CounterId id, PMEVTYPER_t val)
|
||||
// need to update the probes the counter is using.
|
||||
if (id != PMCCNTR && old_event_id != val.evtCount) {
|
||||
ctr.eventId = val.evtCount;
|
||||
updateCounter(reg_pmselr.sel, ctr);
|
||||
updateCounter(ctr);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -574,6 +696,19 @@ PMU::unserialize(CheckpointIn &cp)
|
||||
cycleCounter.unserializeSection(cp, "cycleCounter");
|
||||
}
|
||||
|
||||
PMU::PMUEvent*
|
||||
PMU::getEvent(uint64_t eventId)
|
||||
{
|
||||
auto entry = eventMap.find(eventId);
|
||||
|
||||
if (entry == eventMap.end()) {
|
||||
warn("event %d does not exist\n", eventId);
|
||||
return nullptr;
|
||||
} else {
|
||||
return entry->second;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
PMU::CounterState::serialize(CheckpointOut &cp) const
|
||||
{
|
||||
@@ -590,16 +725,50 @@ PMU::CounterState::unserialize(CheckpointIn &cp)
|
||||
UNSERIALIZE_SCALAR(overflow64);
|
||||
}
|
||||
|
||||
bool
|
||||
uint64_t
|
||||
PMU::CounterState::add(uint64_t delta)
|
||||
{
|
||||
const uint64_t msb(1ULL << (overflow64 ? 63 : 31));
|
||||
const uint64_t old_value(value);
|
||||
uint64_t value_until_overflow;
|
||||
if (overflow64) {
|
||||
value_until_overflow = UINT64_MAX - value;
|
||||
} else {
|
||||
value_until_overflow = UINT32_MAX - (uint32_t)value;
|
||||
}
|
||||
|
||||
value += delta;
|
||||
if (isFiltered())
|
||||
return value_until_overflow;
|
||||
|
||||
// Overflow if the msb goes from 1 to 0
|
||||
return (old_value & msb) && !(value & msb);
|
||||
if (resetValue) {
|
||||
delta = 0;
|
||||
resetValue = false;
|
||||
} else {
|
||||
value += delta;
|
||||
}
|
||||
|
||||
if (delta > value_until_overflow) {
|
||||
|
||||
// overflow situation detected
|
||||
// flag the overflow occurence
|
||||
pmu.reg_pmovsr |= (1 << counterId);
|
||||
|
||||
// Deliver a PMU interrupt if interrupt delivery is enabled
|
||||
// for this counter.
|
||||
if (pmu.reg_pminten & (1 << counterId)) {
|
||||
pmu.raiseInterrupt();
|
||||
}
|
||||
return overflow64 ? UINT64_MAX : UINT32_MAX;
|
||||
}
|
||||
return value_until_overflow - delta + 1;
|
||||
}
|
||||
|
||||
void
|
||||
PMU::SWIncrementEvent::write(uint64_t val)
|
||||
{
|
||||
for (auto& counter: userCounters) {
|
||||
if (val & (0x1 << counter->getCounterId())) {
|
||||
counter->add(1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace ArmISA
|
||||
|
||||
@@ -47,8 +47,13 @@
|
||||
|
||||
#include "arch/arm/isa_device.hh"
|
||||
#include "arch/arm/registers.hh"
|
||||
#include "sim/probe/probe.hh"
|
||||
#include "arch/arm/system.hh"
|
||||
#include "base/cprintf.hh"
|
||||
#include "cpu/base.hh"
|
||||
#include "debug/PMUVerbose.hh"
|
||||
#include "sim/eventq.hh"
|
||||
#include "sim/sim_object.hh"
|
||||
#include "sim/system.hh"
|
||||
|
||||
class ArmPMUParams;
|
||||
class Platform;
|
||||
@@ -94,6 +99,9 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
~PMU();
|
||||
|
||||
void addEventProbe(unsigned int id, SimObject *obj, const char *name);
|
||||
void addSoftwareIncrementEvent(unsigned int id);
|
||||
|
||||
void registerEvent(uint32_t id);
|
||||
|
||||
public: // SimObject and related interfaces
|
||||
void serialize(CheckpointOut &cp) const override;
|
||||
@@ -101,6 +109,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
|
||||
void drainResume() override;
|
||||
|
||||
void regProbeListeners() override;
|
||||
|
||||
public: // ISA Device interface
|
||||
/**
|
||||
@@ -183,9 +192,6 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
*/
|
||||
typedef unsigned int EventTypeId;
|
||||
|
||||
/** ID of the software increment event */
|
||||
static const EventTypeId ARCH_EVENT_SW_INCR = 0x00;
|
||||
|
||||
protected: /* High-level register and interrupt handling */
|
||||
MiscReg readMiscRegInt(int misc_reg);
|
||||
|
||||
@@ -220,7 +226,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
* not exist.
|
||||
*/
|
||||
uint64_t getCounterValue(CounterId id) const {
|
||||
return isValidCounter(id) ? getCounter(id).value : 0;
|
||||
return isValidCounter(id) ? getCounter(id).getValue() : 0;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -261,73 +267,134 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
void setCounterTypeRegister(CounterId id, PMEVTYPER_t type);
|
||||
|
||||
protected: /* Probe handling and counter state */
|
||||
class ProbeListener : public ProbeListenerArgBase<uint64_t>
|
||||
{
|
||||
public:
|
||||
ProbeListener(PMU &_pmu, CounterId _id,
|
||||
ProbeManager *pm, const std::string &name)
|
||||
: ProbeListenerArgBase(pm, name),
|
||||
pmu(_pmu), id(_id) {}
|
||||
struct CounterState;
|
||||
|
||||
void notify(const uint64_t &val) override
|
||||
{
|
||||
pmu.handleEvent(id, val);
|
||||
/**
|
||||
* Event definition base class
|
||||
*/
|
||||
struct PMUEvent {
|
||||
|
||||
PMUEvent() {}
|
||||
|
||||
virtual ~PMUEvent() {}
|
||||
|
||||
/**
|
||||
* attach this event to a given counter
|
||||
*
|
||||
* @param a pointer to the counter where to attach this event
|
||||
*/
|
||||
void attachEvent(PMU::CounterState *user);
|
||||
|
||||
/**
|
||||
* detach this event from a given counter
|
||||
*
|
||||
* @param a pointer to the counter where to detach this event from
|
||||
*/
|
||||
void detachEvent(PMU::CounterState *user);
|
||||
|
||||
/**
|
||||
* notify an event increment of val units, all the attached counters'
|
||||
* value is incremented by val units.
|
||||
*
|
||||
* @param the quantity by which to increment the attached counter
|
||||
* values
|
||||
*/
|
||||
virtual void increment(const uint64_t val);
|
||||
|
||||
/**
|
||||
* Enable the current event
|
||||
*/
|
||||
virtual void enable() = 0;
|
||||
|
||||
/**
|
||||
* Disable the current event
|
||||
*/
|
||||
virtual void disable() = 0;
|
||||
|
||||
/**
|
||||
* Method called immediately before a counter access in order for
|
||||
* the associated event to update its state (if required)
|
||||
*/
|
||||
virtual void updateAttachedCounters() {}
|
||||
|
||||
protected:
|
||||
|
||||
/** set of counters using this event **/
|
||||
std::set<PMU::CounterState*> userCounters;
|
||||
};
|
||||
|
||||
struct RegularEvent : public PMUEvent {
|
||||
typedef std::pair<SimObject*, std::string> EventTypeEntry;
|
||||
|
||||
void addMicroarchitectureProbe(SimObject* object,
|
||||
std::string name) {
|
||||
|
||||
panic_if(!object,"malformed probe-point"
|
||||
" definition with name %s\n", name);
|
||||
|
||||
microArchitectureEventSet.emplace(object, name);
|
||||
}
|
||||
|
||||
protected:
|
||||
PMU &pmu;
|
||||
const CounterId id;
|
||||
struct RegularProbe: public ProbeListenerArgBase<uint64_t>
|
||||
{
|
||||
RegularProbe(RegularEvent *parent, SimObject* obj,
|
||||
std::string name)
|
||||
: ProbeListenerArgBase(obj->getProbeManager(), name),
|
||||
parentEvent(parent) {}
|
||||
|
||||
RegularProbe() = delete;
|
||||
|
||||
void notify(const uint64_t &val);
|
||||
|
||||
protected:
|
||||
RegularEvent *parentEvent;
|
||||
};
|
||||
|
||||
/** The set of events driving the event value **/
|
||||
std::set<EventTypeEntry> microArchitectureEventSet;
|
||||
|
||||
/** Set of probe listeners tapping onto each of the input micro-arch
|
||||
* events which compose this pmu event
|
||||
*/
|
||||
std::vector<std::unique_ptr<RegularProbe>> attachedProbePointList;
|
||||
|
||||
void enable() override;
|
||||
|
||||
void disable() override;
|
||||
};
|
||||
|
||||
class SWIncrementEvent : public PMUEvent
|
||||
{
|
||||
void enable() override {}
|
||||
void disable() override {}
|
||||
|
||||
public:
|
||||
|
||||
/**
|
||||
* write on the sw increment register inducing an increment of the
|
||||
* counters with this event selected according to the bitfield written.
|
||||
*
|
||||
* @param the bitfield selecting the counters to increment.
|
||||
*/
|
||||
void write(uint64_t val);
|
||||
};
|
||||
typedef std::unique_ptr<ProbeListener> ProbeListenerUPtr;
|
||||
|
||||
/**
|
||||
* Event type configuration
|
||||
* Obtain the event of a given id
|
||||
*
|
||||
* The main purpose of this class is to describe how a PMU event
|
||||
* type is sampled. It is implemented as a probe factory that
|
||||
* returns a probe attached to the object the event is mointoring.
|
||||
* @param the id of the event to obtain
|
||||
* @return a pointer to the event with id eventId
|
||||
*/
|
||||
struct EventType {
|
||||
/**
|
||||
* @param _obj Target SimObject
|
||||
* @param _name Probe name
|
||||
*/
|
||||
EventType(SimObject *_obj, const std::string &_name)
|
||||
: obj(_obj), name(_name) {}
|
||||
PMUEvent* getEvent(uint64_t eventId);
|
||||
|
||||
/**
|
||||
* Create and attach a probe used to drive this event.
|
||||
*
|
||||
* @param pmu PMU owning the probe.
|
||||
* @param CounterID counter ID within the PMU.
|
||||
* @return Pointer to a probe listener.
|
||||
*/
|
||||
std::unique_ptr<ProbeListener> create(PMU &pmu, CounterId cid) const
|
||||
{
|
||||
std::unique_ptr<ProbeListener> ptr;
|
||||
ptr.reset(new ProbeListener(pmu, cid,
|
||||
obj->getProbeManager(), name));
|
||||
return ptr;
|
||||
}
|
||||
|
||||
/** SimObject being measured by this probe */
|
||||
SimObject *const obj;
|
||||
/** Probe name within obj */
|
||||
const std::string name;
|
||||
|
||||
private:
|
||||
// Disable the default constructor
|
||||
EventType();
|
||||
};
|
||||
|
||||
/** State of a counter within the PMU. */
|
||||
/** State of a counter within the PMU. **/
|
||||
struct CounterState : public Serializable {
|
||||
CounterState()
|
||||
: eventId(0), filter(0), value(0), enabled(false),
|
||||
overflow64(false) {
|
||||
|
||||
listeners.reserve(4);
|
||||
}
|
||||
CounterState(PMU &pmuReference, uint64_t counter_id)
|
||||
: eventId(0), filter(0), enabled(false),
|
||||
overflow64(false), sourceEvent(nullptr),
|
||||
counterId(counter_id), value(0), resetValue(false),
|
||||
pmu(pmuReference) {}
|
||||
|
||||
void serialize(CheckpointOut &cp) const override;
|
||||
void unserialize(CheckpointIn &cp) override;
|
||||
@@ -336,9 +403,46 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
* Add an event count to the counter and check for overflow.
|
||||
*
|
||||
* @param delta Number of events to add to the counter.
|
||||
* @return true on overflow, false otherwise.
|
||||
* @return the quantity remaining until a counter overflow occurs.
|
||||
*/
|
||||
bool add(uint64_t delta);
|
||||
uint64_t add(uint64_t delta);
|
||||
|
||||
bool isFiltered() const;
|
||||
|
||||
/**
|
||||
* Detach the counter from its event
|
||||
*/
|
||||
void detach();
|
||||
|
||||
/**
|
||||
* Attach this counter to an event
|
||||
*
|
||||
* @param the event to attach the counter to
|
||||
*/
|
||||
void attach(PMUEvent* event);
|
||||
|
||||
/**
|
||||
* Obtain the counter id
|
||||
*
|
||||
* @return the pysical counter id
|
||||
*/
|
||||
uint64_t getCounterId() const{
|
||||
return counterId;
|
||||
}
|
||||
|
||||
/**
|
||||
* rReturn the counter value
|
||||
*
|
||||
* @return the counter value
|
||||
*/
|
||||
uint64_t getValue() const;
|
||||
|
||||
/**
|
||||
* overwrite the value of the counter
|
||||
*
|
||||
* @param the new counter value
|
||||
*/
|
||||
void setValue(uint64_t val);
|
||||
|
||||
public: /* Serializable state */
|
||||
/** Counter event ID */
|
||||
@@ -347,32 +451,37 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
/** Filtering settings (evtCount is unused) */
|
||||
PMEVTYPER_t filter;
|
||||
|
||||
/** Current value of the counter */
|
||||
uint64_t value;
|
||||
|
||||
/** Is the counter enabled? */
|
||||
bool enabled;
|
||||
|
||||
/** Is this a 64-bit counter? */
|
||||
bool overflow64;
|
||||
|
||||
public: /* Configuration */
|
||||
/** Probe listeners driving this counter */
|
||||
std::vector<ProbeListenerUPtr> listeners;
|
||||
};
|
||||
protected: /* Configuration */
|
||||
/** PmuEvent currently in use (if any) **/
|
||||
PMUEvent *sourceEvent;
|
||||
|
||||
/**
|
||||
* Handle an counting event triggered by a probe.
|
||||
*
|
||||
* This method is called by the ProbeListener class whenever an
|
||||
* active probe is triggered. Ths method adds the event count from
|
||||
* the probe to the affected counter, checks for overflows, and
|
||||
* delivers an interrupt if needed.
|
||||
*
|
||||
* @param id Counter ID affected by the probe.
|
||||
* @param delta Counter increment
|
||||
*/
|
||||
void handleEvent(CounterId id, uint64_t delta);
|
||||
/** id of the counter instance **/
|
||||
uint64_t counterId;
|
||||
|
||||
/** Current value of the counter */
|
||||
uint64_t value;
|
||||
|
||||
/** Flag keeping track if the counter has been reset **/
|
||||
bool resetValue;
|
||||
|
||||
PMU &pmu;
|
||||
|
||||
template <typename ...Args>
|
||||
void debugCounter(const char* mainString, Args &...args) const {
|
||||
|
||||
std::string userString = csprintf(mainString, args...);
|
||||
|
||||
warn("[counterId = %d, eventId = %d, sourceEvent = 0x%x] %s",
|
||||
counterId, eventId, sourceEvent, userString.c_str());
|
||||
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* Is this a valid counter ID?
|
||||
@@ -398,7 +507,6 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
return id == PMCCNTR ? cycleCounter : counters[id];
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Return the state of a counter.
|
||||
*
|
||||
@@ -422,7 +530,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
* @param id ID of counter within the PMU.
|
||||
* @param ctr Reference to the counter's state
|
||||
*/
|
||||
void updateCounter(CounterId id, CounterState &ctr);
|
||||
void updateCounter(CounterState &ctr);
|
||||
|
||||
/**
|
||||
* Check if a counter's settings allow it to be counted.
|
||||
@@ -468,14 +576,25 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
/** Remainder part when the clock counter is divided by 64 */
|
||||
unsigned clock_remainder;
|
||||
|
||||
/** The number of regular event counters **/
|
||||
uint64_t maximumCounterCount;
|
||||
|
||||
/** State of all general-purpose counters supported by PMU */
|
||||
std::vector<CounterState> counters;
|
||||
|
||||
/** State of the cycle counter */
|
||||
CounterState cycleCounter;
|
||||
|
||||
/** The id of the counter hardwired to the cpu cycle counter **/
|
||||
const uint64_t cycleCounterEventId;
|
||||
|
||||
/** The event that implements the software increment **/
|
||||
SWIncrementEvent *swIncrementEvent;
|
||||
|
||||
protected: /* Configuration and constants */
|
||||
/** Constant (configuration-dependent) part of the PMCR */
|
||||
PMCR_t reg_pmcr_conf;
|
||||
|
||||
/** PMCR write mask when accessed from the guest */
|
||||
static const MiscReg reg_pmcr_wr_mask;
|
||||
|
||||
@@ -485,22 +604,9 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
|
||||
Platform *const platform;
|
||||
|
||||
/**
|
||||
* Event types supported by this PMU.
|
||||
*
|
||||
* Each event type ID can map to multiple EventType structures,
|
||||
* which enables the PMU to use multiple probes for a single
|
||||
* event. This can be useful in the following cases:
|
||||
* <ul>
|
||||
* <li>Some events can are increment by multiple different probe
|
||||
* points (e.g., the CPU memory access counter gets
|
||||
* incremented for both loads and stores).
|
||||
*
|
||||
* <li>A system switching between multiple CPU models can
|
||||
* register events for all models that will execute a thread
|
||||
* and tehreby ensure that the PMU continues to work.
|
||||
* </ul>
|
||||
* List of event types supported by this PMU.
|
||||
*/
|
||||
std::multimap<EventTypeId, EventType> pmuEventTypes;
|
||||
std::map<EventTypeId, PMUEvent*> eventMap;
|
||||
};
|
||||
|
||||
} // namespace ArmISA
|
||||
|
||||
Reference in New Issue
Block a user