Matthew Poremba e392603d81 arch-vega: Add missing operand size for ds_write2st64_b64 ...

This instruction takes three operands (address, and two datas) but there
were only operand sizes for two operands tripping assert in default
case.

Change-Id: I3f505b6432aee5f3f265acac46b83c0c7daff3e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67071
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>

2023-01-03 22:53:30 +00:00

..

arch

arch-vega: Add missing operand size for ds_write2st64_b64

2023-01-03 22:53:30 +00:00

base

misc: Update version info for develop branch

2023-01-03 22:08:08 +00:00

cpu

python: Fix multiline quotes in a single line

2022-11-29 23:44:38 +00:00

dev

dev: Fix -Wunused-variable in structured binding

2022-12-22 08:07:51 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

gpu-compute: Fix ABI init for DispatchId

2022-12-16 18:16:18 +00:00

kern

arch-x86,sim-se: Add clone3 syscall

2022-10-27 23:57:43 +00:00

learning_gem5

python: Fix multiline quotes in a single line

2022-11-29 23:44:38 +00:00

mem

gpu-compute,mem-ruby: Add support for GPU cache bypassing

2023-01-03 21:19:24 +00:00

proto

misc: Run pre-commit run on all files in repo

2022-08-24 21:47:07 +00:00

python

misc: Update version info for develop branch

2023-01-03 22:08:08 +00:00

sim

dev: Implement a "Signal" port which has a templated State type.

2022-12-16 07:19:05 +00:00

sst

misc: Run pre-commit run on all files in repo

2022-08-24 21:47:07 +00:00

systemc

systemc: Enable DMI in the non-blocking/timing mode bridge.

2022-12-07 12:23:35 +00:00

Doxyfile

misc: Update version info for develop branch

2023-01-03 22:08:08 +00:00

SConscript

scons: fix protobuf action for imports

2022-10-15 14:22:03 +00:00