ea3ee880aa
Added the following instructions: c.lbu c.lh c.lhu c.sb c.sh c.zext.b c.sext.b c.zext.h c.sext.h c.zext.w c.not c.mul Reference: https://github.com/riscv/riscv-code-size-reduction Change-Id: Ib04820bf5591b365a3bfbbd8b90655a8a1d844cf
162 lines
4.6 KiB
C++
162 lines
4.6 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2015 RISC-V Foundation
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// Copyright (c) 2016 The University of Virginia
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// Copyright (c) 2020 Barkhausen Institut
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// Copyright (c) 2022 Google LLC
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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////////////////////////////////////////////////////////////////////
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//
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// Bitfield definitions.
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//
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def bitfield RVTYPE rv_type;
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def bitfield QUADRANT <1:0>;
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def bitfield OPCODE5 <6:2>;
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// R-Type
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def bitfield ALL <31:0>;
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def bitfield RD <11:7>;
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def bitfield FUNCT3 <14:12>;
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def bitfield RS1 <19:15>;
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def bitfield RS2 <24:20>;
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def bitfield FUNCT7 <31:25>;
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// Bit shifts
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def bitfield SRTYPE <30>;
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def bitfield SHAMT5 <24:20>;
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def bitfield SHAMT6 <25:20>;
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def bitfield SHAMT6BIT5 <25>;
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// I-Type
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def bitfield IMM12 <31:20>;
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// Sync
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def bitfield SUCC <23:20>;
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def bitfield PRED <27:24>;
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// S-Type
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def bitfield IMM5 <11:7>;
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def bitfield IMM7 <31:25>;
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// U-Type
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def bitfield IMM20 <31:12>;
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// SB-Type
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def bitfield BIMM12BIT11 <7>;
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def bitfield BIMM12BITS4TO1<11:8>;
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def bitfield BIMM12BITS10TO5 <30:25>;
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def bitfield IMMSIGN <31>;
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// UJ-Type
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def bitfield UJIMMBITS10TO1 <30:21>;
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def bitfield UJIMMBIT11 <20>;
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def bitfield UJIMMBITS19TO12 <19:12>;
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// System
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def bitfield FUNCT12 <31:20>;
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def bitfield CSRIMM <19:15>;
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// Floating point
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def bitfield FD <11:7>;
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def bitfield FS1 <19:15>;
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def bitfield FS2 <24:20>;
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def bitfield FS3 <31:27>;
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def bitfield ROUND_MODE <14:12>;
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def bitfield CONV_SGN <24:20>;
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def bitfield FUNCT2 <26:25>;
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// AMO
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def bitfield AMOFUNCT <31:27>;
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def bitfield AQ <26>;
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def bitfield RL <25>;
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// Compressed
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def bitfield COPCODE <15:13>;
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def bitfield CFUNCT6LOW3 <12:10>;
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def bitfield CFUNCT1 <12>;
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def bitfield CFUNCT1BIT6 <6>;
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def bitfield CFUNCT2HIGH <11:10>;
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def bitfield CFUNCT2LOW <6:5>;
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def bitfield RC1 <11:7>;
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def bitfield RC2 <6:2>;
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def bitfield RP1 <9:7>;
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def bitfield RP2 <4:2>;
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def bitfield FC1 <11:7>;
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def bitfield FC2 <6:2>;
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def bitfield FP2 <4:2>;
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def bitfield CJUMPIMM <12:2>;
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def bitfield CJUMPIMM3TO1 <5:3>;
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def bitfield CJUMPIMM4TO4 <11:11>;
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def bitfield CJUMPIMM5TO5 <2:2>;
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def bitfield CJUMPIMM6TO6 <7:7>;
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def bitfield CJUMPIMM7TO7 <6:6>;
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def bitfield CJUMPIMM9TO8 <10:9>;
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def bitfield CJUMPIMM10TO10 <8:8>;
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def bitfield CJUMPIMMSIGN <12:12>;
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def bitfield CIMM8 <12:5>;
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def bitfield CIMM6 <12:7>;
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def bitfield CIMM5 <6:2>;
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def bitfield CIMM3 <12:10>;
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def bitfield CIMM2 <6:5>;
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def bitfield CIMM1 <12>;
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// Pseudo instructions
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def bitfield M5FUNC <31:25>;
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// Cryptography instructions
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def bitfield BIT24 <24>;
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def bitfield BIT25 <25>;
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def bitfield RNUM <23:20>;
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def bitfield KFUNCT5 <29:25>;
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def bitfield BS <31:30>;
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// Vector instructions
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def bitfield VFUNCT6 vfunct6;
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def bitfield VFUNCT5 vfunct5;
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def bitfield VFUNCT3 vfunct3;
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def bitfield VFUNCT2 vfunct2;
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def bitfield VS3 vs3;
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def bitfield VS2 vs2;
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def bitfield VS1 vs1;
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def bitfield VD vd;
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def bitfield NF nf;
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def bitfield MEW mew;
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def bitfield MOP mop;
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def bitfield VM vm;
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def bitfield LUMOP lumop;
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def bitfield SUMOP sumop;
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def bitfield WIDTH width;
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def bitfield BIT31 bit31;
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def bitfield BIT30 bit30;
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def bitfield SIMM5 uimm_vsetivli;
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def bitfield SIMM3 simm3;
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