Gabe Black cac49d4e47 arch,cpu,sim: Get rid of the microcode ROM stub code. ...

This code, including a switching header file, is no longer necessary
because ROM based microops are now handled by the decoder itself.

Change-Id: Ie3ea4a7371dec22993ede80e2acd1df7cd1ecf59
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32899
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2020-08-25 12:41:30 +00:00

..

arch

arch,cpu,sim: Get rid of the microcode ROM stub code.

2020-08-25 12:41:30 +00:00

base

misc: Delete the critical path annotation code.

2020-08-23 03:17:13 +00:00

cpu

arch,cpu,sim: Get rid of the microcode ROM stub code.

2020-08-25 12:41:30 +00:00

dev

misc: Delete the critical path annotation code.

2020-08-23 03:17:13 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

misc,sim: Tagged API methods in sim/simobject.hh

2020-05-19 21:58:24 +00:00

gpu-compute

configs,gpu-compute,mem-ruby: connect gmTokenPorts in apu_se

2020-08-18 23:47:16 +00:00

kern

kern: Stop using TheISA::GuestByteOrder in Linux::dumpDmesg.

2020-08-20 01:38:45 +00:00

learning_gem5

misc: Make many includes explicit.

2020-06-03 19:42:46 +00:00

mem

mem: Use getGuestByteOrder in the indirect memory prefetcher.

2020-08-21 22:18:23 +00:00

proto

misc: Use the protobuf version to choose between ByteSize(Long).

2020-04-29 21:46:11 +00:00

python

util,scons: improve compareVersions function

2020-07-31 18:40:30 +00:00

sim

arch,cpu,sim: Get rid of the microcode ROM stub code.

2020-08-25 12:41:30 +00:00

systemc

systemc: Adjust some type names in a couple tests.

2020-08-05 23:53:45 +00:00

unittest

arch,base,cpu,kerm,sim: Build a symbol table for object files.

2020-06-09 23:37:29 +00:00

Doxyfile

misc: Reverting version numbers

2020-07-03 20:59:44 -07:00

SConscript

scons: Remove the plumbing for running regression tests from scons.

2020-08-05 09:39:17 +00:00