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b52ea6e98cb27c97aeea1085c4f5fdcbbdf66f0c
gem5/src/cpu/minor
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Gabe Black b52ea6e98c cpu, power: Get rid of the remnants of the EA computation insts. 
Get rid of some remnants of a system which was intended to separate
address computation into its own instruction object.

Change-Id: I23f9ffd70fcb89a8ea5bbb934507fb00da9a0b7f
Reviewed-on: https://gem5-review.googlesource.com/7122
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
2018-01-09 03:02:26 +00:00
..
activity.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
activity.hh
cpu: `Minor' in-order CPU model
2014-07-23 16:09:04 -05:00
buffers.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
cpu.cc
pwr: Adds logic to enter power gating for the cpu model
2017-11-20 11:03:03 +00:00
cpu.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
decode.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
decode.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
dyn_inst.cc
misc: Updates for gcc7.2 for x86
2017-12-14 00:27:59 +00:00
dyn_inst.hh
cpu, power: Get rid of the remnants of the EA computation insts.
2018-01-09 03:02:26 +00:00
exec_context.hh
cpu, power: Get rid of the remnants of the EA computation insts.
2018-01-09 03:02:26 +00:00
execute.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
execute.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
fetch1.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
fetch1.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
fetch2.cc
cpu-minor: Add missing instruction stats
2017-11-29 10:00:40 +00:00
fetch2.hh
cpu-minor: Add missing instruction stats
2017-11-29 10:00:40 +00:00
func_unit.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
func_unit.hh
arch: Use const StaticInstPtr references where possible
2014-09-27 09:08:36 -04:00
lsq.cc
cpu: Add support for CMOs in the cpu models
2017-12-05 11:47:01 +00:00
lsq.hh
cpu: Refactor some Event subclasses to lambdas
2017-07-12 20:07:05 +00:00
MinorCPU.py
cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass
2016-10-15 14:58:45 -05:00
pipe_data.cc
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
pipe_data.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
pipeline.cc
cpu-minor: Add missing instruction stats
2017-11-29 10:00:40 +00:00
pipeline.hh
cpu-minor: Add missing instruction stats
2017-11-29 10:00:40 +00:00
SConscript
cpu: `Minor' in-order CPU model
2014-07-23 16:09:04 -05:00
SConsopts
arch, cpu: Factor out the ExecContext into a proper base class
2014-09-03 07:42:22 -04:00
scoreboard.cc
cpu: Added interface for vector reg file
2017-07-05 14:43:49 +00:00
scoreboard.hh
cpu: Added interface for vector reg file
2017-07-05 14:43:49 +00:00
stats.cc
cpu: Add instruction opclass histogram to minor
2016-04-05 08:08:12 -05:00
stats.hh
cpu: Add instruction opclass histogram to minor
2016-04-05 08:08:12 -05:00
trace.hh
cpu: `Minor' in-order CPU model
2014-07-23 16:09:04 -05:00