cpu, power: Get rid of the remnants of the EA computation insts.

Get rid of some remnants of a system which was intended to separate
address computation into its own instruction object.

Change-Id: I23f9ffd70fcb89a8ea5bbb934507fb00da9a0b7f
Reviewed-on: https://gem5-review.googlesource.com/7122
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

src/arch/power/isa/formats/mem.isa

@@ -98,7 +98,6 @@ def template LoadInitiateAcc {{
 
         if (fault == NoFault) {
             fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);
-            xc->setEA(EA);
         }
 
         return fault;
@@ -117,7 +116,7 @@ def template LoadCompleteAcc {{
         %(op_decl)s;
         %(op_rd)s;
 
-        EA = xc->getEA();
+        EA = pkt->req->getVaddr();
 
         getMem(pkt, Mem, traceData);
 

src/cpu/base_dyn_inst.hh

@@ -132,10 +132,6 @@ class BaseDynInst : public ExecContext, public RefCounted
         RecordResult,
         Predicate,
         PredTaken,
-        /** Whether or not the effective address calculation is completed.
-         *  @todo: Consider if this is necessary or not.
-         */
-        EACalcDone,
         IsStrictlyOrdered,
         ReqMade,
         MemOpDone,
@@ -245,12 +241,6 @@ class BaseDynInst : public ExecContext, public RefCounted
     // Need a copy of main request pointer to verify on writes.
     RequestPtr reqToVerify;
 
-  private:
-    /** Instruction effective address.
-     *  @todo: Consider if this is necessary or not.
-     */
-    Addr instEffAddr;
-
   protected:
     /** Flattened register index of the destination registers of this
      *  instruction.
@@ -859,15 +849,6 @@ class BaseDynInst : public ExecContext, public RefCounted
     ThreadContext *tcBase() { return thread->getTC(); }
 
   public:
-    /** Sets the effective address. */
-    void setEA(Addr ea) { instEffAddr = ea; instFlags[EACalcDone] = true; }
-
-    /** Returns the effective address. */
-    Addr getEA() const { return instEffAddr; }
-
-    /** Returns whether or not the eff. addr. calculation has been completed. */
-    bool doneEACalc() { return instFlags[EACalcDone]; }
-
     /** Returns whether or not the eff. addr. source registers are ready. */
     bool eaSrcsReady();
 

src/cpu/checker/cpu.hh

@@ -181,13 +181,6 @@ class CheckerCPU : public BaseCPU, public ExecContext
     void serialize(CheckpointOut &cp) const override;
     void unserialize(CheckpointIn &cp) override;
 
-    // These functions are only used in CPU models that split
-    // effective address computation from the actual memory access.
-    void setEA(Addr EA) override
-    { panic("CheckerCPU::setEA() not implemented\n"); }
-    Addr getEA() const  override
-    { panic("CheckerCPU::getEA() not implemented\n"); }
-
     // The register accessor methods provide the index of the
     // instruction's operand (e.g., 0 or 1), not the architectural
     // register index, to simplify the implementation of register

src/cpu/exec_context.hh

@@ -222,19 +222,6 @@ class ExecContext {
      * @{
      * @name Memory Interface
      */
-    /**
-     * Record the effective address of the instruction.
-     *
-     * @note Only valid for memory ops.
-     */
-    virtual void setEA(Addr EA) = 0;
-    /**
-     * Get the effective address of the instruction.
-     *
-     * @note Only valid for memory ops.
-     */
-    virtual Addr getEA() const = 0;
-
     /**
      * Perform an atomic memory read operation.  Must be overridden
      * for exec contexts that support atomic memory mode.  Not pure

src/cpu/minor/dyn_inst.hh

@@ -221,9 +221,6 @@ class MinorDynInst : public RefCounted
      *  up */
     RegId flatDestRegIdx[TheISA::MaxInstDestRegs];
 
-    /** Effective address as set by ExecContext::setEA */
-    Addr ea;
-
   public:
     MinorDynInst(InstId id_ = InstId(), Fault fault_ = NoFault) :
         staticInst(NULL), id(id_), traceData(NULL),
@@ -232,8 +229,7 @@ class MinorDynInst : public RefCounted
         fuIndex(0), inLSQ(false), inStoreBuffer(false),
         canEarlyIssue(false),
         instToWaitFor(0), extraCommitDelay(Cycles(0)),
-        extraCommitDelayExpr(NULL), minimumCommitCycle(Cycles(0)),
-        ea(0)
+        extraCommitDelayExpr(NULL), minimumCommitCycle(Cycles(0))
     { }
 
   public:

src/cpu/minor/exec_context.hh

@@ -424,20 +424,8 @@ class ExecContext : public ::ExecContext
         thread.getDTBPtr()->demapPage(vaddr, asn);
     }
 
-    /* ALPHA/POWER: Effective address storage */
-    void setEA(Addr ea) override
-    {
-        inst->ea = ea;
-    }
-
     BaseCPU *getCpuPtr() { return &cpu; }
 
-    /* POWER: Effective address storage */
-    Addr getEA() const override
-    {
-        return inst->ea;
-    }
-
     /* MIPS: other thread register reading/writing */
     uint64_t
     readRegOtherThread(const RegId& reg, ThreadID tid = InvalidThreadID)

src/cpu/simple/exec_context.hh

@@ -413,22 +413,6 @@ class SimpleExecContext : public ExecContext {
     }
 
 
-    /**
-     * Record the effective address of the instruction.
-     *
-     * @note Only valid for memory ops.
-     */
-    void setEA(Addr EA) override
-    { panic("BaseSimpleCPU::setEA() not implemented\n"); }
-
-    /**
-     * Get the effective address of the instruction.
-     *
-     * @note Only valid for memory ops.
-     */
-    Addr getEA() const override
-    { panic("BaseSimpleCPU::getEA() not implemented\n"); }
-
     Fault readMem(Addr addr, uint8_t *data, unsigned int size,
                   Request::Flags flags) override
     {