Srikant Bharadwaj ae233c7723 cpu: Fix indirect branch history updates ...

Recent changes to indirect branch predictor interface accesses
non-existent buffers even when indirect predictor is not in use.

Change-Id: I0df9ac4d5f6f3cb63e4d1bd36949c27f7611eef6
Reviewed-on: https://gem5-review.googlesource.com/c/16668
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

2019-02-26 19:52:43 +00:00

..

arch

python: Enforce absolute imports for Python 3 compatibility

2019-02-23 23:34:05 +00:00

base

base: Fix enums checkpointing

2019-02-18 09:57:33 +00:00

cpu

cpu: Fix indirect branch history updates

2019-02-26 19:52:43 +00:00

dev

dev-arm: LPI support for GICv3. This doesn't include an ITS model.

2019-02-18 11:45:24 +00:00

doc

docs: Fix power model doxygen

2018-04-20 15:59:35 +00:00

doxygen

…

gpu-compute

python: Don't assume SimObjects live in the global namespace

2019-02-12 09:43:00 +00:00

kern

kern,sim: implement FUTEX_WAKE_OP

2019-02-08 15:25:30 +00:00

learning_gem5

python: Don't assume SimObjects live in the global namespace

2019-02-12 09:43:00 +00:00

mem

mem-cache: Copy over flags to forwarded response

2019-02-26 11:17:58 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

scons: Marshal Python sources using the same Python as gem5

2019-02-26 10:27:07 +00:00

sim

sim: Add a mechanism to exit the simulation loop immediately.

2019-02-19 23:34:05 +00:00

systemc

systemc: Remove _m5.systemc passthroughs from SystemC_Kernel.

2019-02-25 23:11:23 +00:00

unittest

python: Replace dict.has_key with 'key in dict'

2019-02-12 17:36:12 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Marshal Python sources using the same Python as gem5

2019-02-26 10:27:07 +00:00