cpu: Fix indirect branch history updates
Recent changes to indirect branch predictor interface accesses non-existent buffers even when indirect predictor is not in use. Change-Id: I0df9ac4d5f6f3cb63e4d1bd36949c27f7611eef6 Reviewed-on: https://gem5-review.googlesource.com/c/16668 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
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@@ -371,7 +371,9 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)
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// This call should delete the bpHistory.
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squash(tid, pred_hist.front().bpHistory);
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iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory);
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if (useIndirect) {
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iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory);
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}
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DPRINTF(Branch, "[tid:%i]: Removing history for [sn:%i] "
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"PC %s.\n", tid, pred_hist.front().seqNum,
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@@ -452,8 +454,10 @@ BPredUnit::squash(const InstSeqNum &squashed_sn,
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pred_hist.front().bpHistory, true, pred_hist.front().inst,
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corrTarget.instAddr());
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iPred.changeDirectionPrediction(tid, pred_hist.front().indirectHistory,
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actually_taken);
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if (useIndirect) {
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iPred.changeDirectionPrediction(tid,
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pred_hist.front().indirectHistory, actually_taken);
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}
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if (actually_taken) {
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if (hist_it->wasReturn && !hist_it->usedRAS) {
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