cpu: Fix indirect branch history updates

Recent changes to indirect branch predictor interface accesses
non-existent buffers even when indirect predictor is not in use.

Change-Id: I0df9ac4d5f6f3cb63e4d1bd36949c27f7611eef6
Reviewed-on: https://gem5-review.googlesource.com/c/16668
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
This commit is contained in:
Srikant Bharadwaj
2019-02-26 14:44:40 -05:00
parent 8e72365058
commit ae233c7723

View File

@@ -371,7 +371,9 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)
// This call should delete the bpHistory.
squash(tid, pred_hist.front().bpHistory);
iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory);
if (useIndirect) {
iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory);
}
DPRINTF(Branch, "[tid:%i]: Removing history for [sn:%i] "
"PC %s.\n", tid, pred_hist.front().seqNum,
@@ -452,8 +454,10 @@ BPredUnit::squash(const InstSeqNum &squashed_sn,
pred_hist.front().bpHistory, true, pred_hist.front().inst,
corrTarget.instAddr());
iPred.changeDirectionPrediction(tid, pred_hist.front().indirectHistory,
actually_taken);
if (useIndirect) {
iPred.changeDirectionPrediction(tid,
pred_hist.front().indirectHistory, actually_taken);
}
if (actually_taken) {
if (hist_it->wasReturn && !hist_it->usedRAS) {