a896960cbf
Also various changes to make the CPU model less ISA dependent, which includes moving the code that checks for interrupts up to the ISA level, moving code that zeroes the zero registers up to the ISA level, and removing opcode and ra from the regfile.
arch/alpha/alpha_memory.cc:
The regfile has been changed so it no longer has the opcode and ra. Instead the xc holds the actual instruction, and from there the opcode and ra can be obtained with OPCODE() and RA().
arch/alpha/ev5.cc:
Moved code that once existed within simpleCPU to ev5, and templatized it.
This way the CPU models can call processInterrupts and the ISA specific interrupt handling is left to the ISA's code.
Also moved ISA specific zero registers from simpleCPU to here.
arch/alpha/ev5.hh:
Added macros for obtaining the opcode and ra from the instruction itself, as there is no longer opcode or ra in the regfile.
arch/alpha/isa_desc:
Added in declarations for the FastCPU model.
arch/alpha/isa_traits.hh:
Removed opcode and ra from the regfile. The xc now holds the actual instruction, and the opcode and ra can be obtained through it.
Also added the declaration for the templated zeroRegisters() function, which will set the zero registers to 0.
arch/isa_parser.py:
Added in FastCPUExecContext so it will generate code for the FastCPU model as well.
cpu/exec_context.cc:
Added in a more generic trap function so "ev5_trap" doesn't need to be called. It currently still calls the old method, with plans for making this ISA dependent in the future.
cpu/exec_context.hh:
Exec context now has the instruction within it. Also added methods for exec context to read an instruction from memory, return the current instruction, and set the instruction if needed.
Also has declaration for more generic trap() function.
cpu/simple_cpu/simple_cpu.cc:
Removed references to opcode and ra, and instead sets the xc's instruction with the fetched instruction.
cpu/static_inst.hh:
Added declaration for execute() using FastCPUExecContext.
--HG--
extra : convert_revision : 0441ea3700ac50b733e485395d4dd4ac83666f92
This is release m5_1.0_beta1 of the M5 simulator. This file contains brief "getting started" information and release notes. For more information, see http://m5.eecs.umich.edu. If you have questions, please send mail to m5sim-users@lists.sourceforge.net. WHAT'S INCLUDED (AND NOT) ------------------------- Since you're reading this file, presumably you've managed to untar the distribution. The archive you've unpacked has three subdirectories: - m5: the simulator itself - m5-test: regression tests and scripts to run them - ext: less-common external packages needed to build m5 (currently just "ply") Although M5 is capable of full-system simulation, the only OS it currently supports is the proprietary Compaq/HP Tru64 version of Unix. We are thus unable to distribute bootable disk images freely. If you have a Tru64 license and are interested in obtaining disk images, contact us at m5-dev@eecs.umich.edu. GETTING STARTED --------------- The following steps will build and test the simulator. The variable "$top" refers to the top directory where you've unpacked the files, i.e., the one containing the m5, m5-test, and ext directories. cd $top/m5/setup ./setup ALPHA # set up build/ALPHA directory cd $top/m5/build/ALPHA make m5.opt # use "-j N" if you've got an MP system # wait for build... cd $top/m5-test ./do-tests.pl -B ALPHA # test what you just built # wait for tests to run... # should end with "finished do-tests successfully!" If you run into errors regarding m5/arch/alpha/decoder.cc, just "touch" that file to update its timestamp. This file is generated from a compact ISA description using a program written in Python. If you have Python 2.2.2 or later installed on your system, you should be able to generate it yourself, but if you don't have Python (or have an older version), you may run in to trouble. Since we've shipped a working copy of decoder.cc, it's not necessary to have Python to build M5 (unless you start modifying the ISA decription). Unfortunately, sometimes make gets confused and tries to do so anyway. The "touch" should convince make to stop trying.