derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
85e1a9b8548ca2df406fd1ff56568a7ee1481aa0
gem5/src/arch/x86
History
Sean Wilson 85e1a9b854 sim, x86: Replace EventWrapper use with EventFunctionWrapper 
Change-Id: Ie1df07b70776208fc3631a73d403024636fc05a9
Signed-off-by: Sean Wilson <spwilson2@wisc.edu>
Reviewed-on: https://gem5-review.googlesource.com/3749
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-06-20 18:03:21 +00:00
..
bios
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
insts
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
isa
x86: Rework how VEX prefixes are decoded.
2017-05-26 20:01:03 +00:00
linux
syscall-emul: Ignore unimplemented system calls
2017-03-09 22:42:45 +00:00
regs
x86: create function to check miscreg validity
2016-02-06 17:21:20 -08:00
cpuid.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
cpuid.hh
scons: Add warning for missing declarations
2013-02-19 05:56:07 -05:00
decoder_tables.cc
x86: Rework how VEX prefixes are decoded.
2017-05-26 20:01:03 +00:00
decoder.cc
x86: Rework how VEX prefixes are decoded.
2017-05-26 20:01:03 +00:00
decoder.hh
x86: Rework how VEX prefixes are decoded.
2017-05-26 20:01:03 +00:00
emulenv.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
emulenv.hh
gcc: Clean-up of non-C++0x compliant code, first steps
2012-03-19 06:36:09 -04:00
faults.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
faults.hh
x86: Invalidating TLB entry on page fault
2015-11-16 05:08:54 -06:00
interrupts.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
interrupts.hh
x86: Add missing explicit overrides for X86 devices
2015-10-23 09:51:12 -04:00
intmessage.hh
MEM: Remove the Broadcast destination from the packet
2012-04-14 05:45:55 -04:00
isa_traits.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
isa.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
isa.hh
misc: Remove redundant compiler-specific defines
2015-10-12 04:07:59 -04:00
kernel_stats.hh
copyright: Change HP copyright on x86 code to be more friendly
2010-05-23 22:44:15 -07:00
ldstflags.hh
arch,x86,mem: Dynamically determine the ISA for Ruby store check
2014-10-16 05:49:44 -04:00
locked_mem.hh
cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped.
2014-01-24 15:29:30 -06:00
memhelpers.hh
cpu, arch: fix the type used for the request flags
2016-08-15 12:00:35 +01:00
microcode_rom.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
mmapped_ipr.hh
arch: Add support for m5ops using mmapped IPRs
2013-09-30 12:20:43 +02:00
nativetrace.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
nativetrace.hh
Make commenting on close namespace brackets consistent.
2011-01-03 14:35:43 -08:00
pagetable_walker.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
pagetable_walker.hh
sim, x86: Replace EventWrapper use with EventFunctionWrapper
2017-06-20 18:03:21 +00:00
pagetable.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
pagetable.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
process.cc
style: Correct some style issues
2017-03-09 22:42:45 +00:00
process.hh
x86: Add consistent overrides to process.hh
2017-06-15 22:25:57 +00:00
pseudo_inst.cc
syscall_emul: [patch 13/22] add system call retry capability
2015-07-20 09:15:21 -05:00
pseudo_inst.hh
kvm, x86: Adding support for SE mode execution
2014-11-23 18:01:08 -08:00
registers.hh
arch: get rid of unused LargestRead typedef
2016-01-17 18:27:46 -08:00
remote_gdb.cc
base: Refactor the GDB code.
2017-05-18 16:48:09 +00:00
remote_gdb.hh
x86: Fixed remote debugging of simulated code
2017-06-15 21:00:34 +00:00
SConscript
kvm, x86: Adding support for SE mode execution
2014-11-23 18:01:08 -08:00
SConsopts
…
stacktrace.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
stacktrace.hh
arch: Use const StaticInstPtr references where possible
2014-09-27 09:08:36 -04:00
system.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
system.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
tlb.cc
x86: remove redundant condition check in tlb code
2017-02-23 13:27:48 -05:00
tlb.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
types.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
types.hh
x86: Rework how VEX prefixes are decoded.
2017-05-26 20:01:03 +00:00
utility.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
utility.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
vtophys.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
vtophys.hh
gcc: Clean-up of non-C++0x compliant code, first steps
2012-03-19 06:36:09 -04:00
x86_traits.hh
arch/x86: add support for explicit CC register file
2013-10-15 14:22:44 -04:00
X86ISA.py
arch: Make the ISA class inherit from SimObject
2013-01-07 13:05:35 -05:00
X86LocalApic.py
sim: Include object header files in SWIG interfaces
2012-11-02 11:32:01 -05:00
X86NativeTrace.py
cpu: Put all CPU instruction tracers in a single file
2015-01-25 07:22:17 -05:00
X86System.py
sim: Include object header files in SWIG interfaces
2012-11-02 11:32:01 -05:00
X86TLB.py
x86: add tlb checkpointing
2013-08-07 14:51:17 -05:00