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gem5/src/dev/net
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Gabe Black 972c38b1cc arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code. 
This code will be preserved through version control, but otherwise
creates clutter and will rot in place since it's never compiled.

Change-Id: Id265f6deac445116843956ea5cf1210d8127274e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18608
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-18 10:20:20 +00:00
..
dist_etherlink.cc
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
dist_etherlink.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
dist_iface.cc
dev: Build most of the networking devices in the NULL_ISA build.
2018-10-17 20:16:29 +00:00
dist_iface.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
dist_packet.hh
dev: Add m5 op to toggle synchronization for dist-gem5.
2016-10-26 22:48:40 -04:00
etherbus.cc
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
etherbus.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
etherdevice.cc
sim: Call regStats of base-class as well
2016-06-06 17:16:43 +01:00
etherdevice.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
etherdump.cc
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
etherdump.hh
dev: Move network devices to src/dev/net/
2015-12-10 10:35:18 +00:00
etherint.cc
mem: Move bind() and unbind() into the Port class.
2019-03-19 10:21:46 +00:00
etherint.hh
mem: Move bind() and unbind() into the Port class.
2019-03-19 10:21:46 +00:00
etherlink.cc
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
etherlink.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
Ethernet.py
dev: Use the new Port role mechanism to make an EtherInt Port type.
2019-04-24 11:00:31 +00:00
etherpkt.cc
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
etherpkt.hh
dev: Fix buffer length when unserializing an eth pkt
2016-11-29 13:04:45 -05:00
etherswitch.cc
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
etherswitch.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
ethertap.cc
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
ethertap.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
i8254xGBe_defs.hh
dev: net/i8254xGBe add two more wakeup registers to ignore
2017-02-09 18:59:55 -05:00
i8254xGBe.cc
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
i8254xGBe.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
ns_gige_reg.h
scons: Enable -Wextra by default
2016-01-11 05:52:20 -05:00
ns_gige.cc
arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.
2019-05-18 10:20:20 +00:00
ns_gige.hh
arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.
2019-05-18 10:20:20 +00:00
pktfifo.cc
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
pktfifo.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
SConscript
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
sinic.cc
arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.
2019-05-18 10:20:20 +00:00
sinic.hh
arch, cpu, dev, gpu, mem, sim, python: start using getPort.
2019-03-19 10:22:50 +00:00
sinicreg.hh
dev: Move network devices to src/dev/net/
2015-12-10 10:35:18 +00:00
tcp_iface.cc
dev: Add m5 op to toggle synchronization for dist-gem5.
2016-10-26 22:48:40 -04:00
tcp_iface.hh
dev: Add m5 op to toggle synchronization for dist-gem5.
2016-10-26 22:48:40 -04:00