dev: Build most of the networking devices in the NULL_ISA build.

The only part of these devices which are incompatible with other ISAs,
with the possible exception of endianness transformation, is that
the dist_iface implementation refers to ThreadContext methods and
that class is heavily tied to the guest ISA. Only those few lines are
excluded in a NULL_ISA build.

Change-Id: Ic6d643fdbb792d0a996a37d75e027c5ce0ecd460
Reviewed-on: https://gem5-review.googlesource.com/c/13469
Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/dev/net/SConscript

@@ -44,9 +44,6 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
-    Return()
-
 SimObject('Ethernet.py')
 
 # Basic Ethernet infrastructure

src/dev/net/dist_iface.cc

@@ -869,11 +869,13 @@ DistIface::toggleSync(ThreadContext *tc)
         // stop point.  Suspend execution of all local thread contexts.
         // Dist-gem5 will reactivate all thread contexts when everyone has
         // reached the sync stop point.
+#if THE_ISA != NULL_ISA
         for (int i = 0; i < master->sys->numContexts(); i++) {
             ThreadContext *tc = master->sys->getThreadContext(i);
             if (tc->status() == ThreadContext::Active)
                 tc->quiesce();
         }
+#endif
     } else {
         inform("Request toggling syncronization on\n");
         master->syncEvent->start();
@@ -882,11 +884,13 @@ DistIface::toggleSync(ThreadContext *tc)
         // nodes to prevent causality errors.  We can also schedule CPU
         // activation here, since we know exactly when the next sync will
         // occur.
+#if THE_ISA != NULL_ISA
         for (int i = 0; i < master->sys->numContexts(); i++) {
             ThreadContext *tc = master->sys->getThreadContext(i);
             if (tc->status() == ThreadContext::Active)
                 tc->quiesceTick(master->syncEvent->when() + 1);
         }
+#endif
     }
 }