Faults in the TLB ought to cause a page walk. Force that by removing the fixup in X86 TLB. This fixes rare race conditions where a timing page walk is intercepted by a TLB miss which fixes up the fault resulting in double calls to allocateMem in Process class. Change-Id: Iaef4d636cd2997144d8bc5012cd7c2a0a97102e5 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27507 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com>