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arch-x86: Do not fixup faults in TLB

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Faults in the TLB ought to cause a page walk. Force that by removing
the fixup in X86 TLB.

This fixes rare race conditions where a timing page walk is
intercepted by a TLB miss which fixes up the fault resulting in
double calls to allocateMem in Process class.

Change-Id: Iaef4d636cd2997144d8bc5012cd7c2a0a97102e5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27507
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Matthew Poremba
2020-04-06 13:09:32 -05:00
parent d228a283c9
commit 553d2079ad
1 changed files with 0 additions and 7 deletions
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7
src/arch/x86/tlb.cc
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@@ -397,13 +397,6 @@ TLB::translate(const RequestPtr &req,
Process *p = tc->getProcessPtr();
const EmulationPageTable::Entry *pte =
p->pTable->lookup(vaddr);
if (!pte && mode != Execute) {
// Check if we just need to grow the stack.
if (p->fixupFault(vaddr)) {
// If we did, lookup the entry for the new page.
pte = p->pTable->lookup(vaddr);
}
}
if (!pte) {
return std::make_shared<PageFault>(vaddr, true, mode,
true, false);