Roger Chang 4dccd7dd6c arch-riscv: Add BS format isa ...

This format is helper for aes32dsi, aes32dsmi, aes32esi, aes32esmi,
sm4ed, sm4ks disassembly

Change-Id: Ieff1932e267efc0a8c5fd8e557fc467dc376da4e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70598
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>

2023-05-23 23:58:16 +00:00

..

arch

arch-riscv: Add BS format isa

2023-05-23 23:58:16 +00:00

base

base: add Activate to enable log of particular targets

2023-05-16 09:02:38 +00:00

cpu

misc: Fix 'unused variable' clang errors with gem5.fast

2023-05-08 22:54:06 +00:00

dev

dev-amdgpu: Update SDMA checkpointing

2023-05-23 14:28:16 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

misc: Rename DEBUG macro into GEM5_DEBUG

2023-03-21 06:53:55 +00:00

kern

misc: Remove the FreeBSD namespace

2023-01-17 09:16:20 +00:00

learning_gem5

mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner

2023-02-03 06:11:45 +00:00

mem

base,arch,mem: Remove {GE}M5_VAR_USED instances

2023-05-08 22:54:06 +00:00

proto

misc: Run pre-commit run on all files in repo

2022-08-24 21:47:07 +00:00

python

sim,python: add activate option and method

2023-05-16 09:02:38 +00:00

sim

arch,base,dev,sim: Convert objects to use the HostSocket param type.

2023-04-12 02:18:22 +00:00

sst

mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner

2023-02-03 06:11:45 +00:00

systemc

misc: Use python f-strings for string formatting

2023-03-16 09:05:29 +00:00

Doxyfile

misc: Update version info for develop branch

2023-01-03 22:08:08 +00:00

SConscript

scons: allow building without duplicating source files

2023-04-05 22:00:07 +00:00