gem5/src/arch/alpha at 4d5f2c28a88f83d390e80407f55a8a02ead33878 - gem5

freebsd

sim: Use forward declarations for ports.

2010-11-08 13:58:22 -06:00

isa

ISA parser: Use '_' instead of '.' to delimit type modifiers on operands.

2011-09-26 23:48:54 -07:00

linux

syscall_emul: implement MAP_FIXED option to mmap()

2011-10-22 22:30:07 -07:00

tru64

syscall_emul: implement MAP_FIXED option to mmap()

2011-10-22 22:30:07 -07:00

AlphaInterrupts.py

Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.

2008-10-12 09:09:56 -07:00

AlphaSystem.py

Loader: Make the load address mask be a parameter of the system rather than a constant.

2010-08-23 11:18:39 -05:00

AlphaTLB.py

tlb: More fixing of unified TLB

2009-04-08 22:21:27 -07:00

aout_machdep.h

style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs

2008-09-10 14:26:15 -04:00

ecoff_machdep.h

New directory structure:

2006-05-22 14:29:33 -04:00

ev5.cc

debug: create a Debug namespace

2011-04-15 10:44:15 -07:00

ev5.hh

Alpha: Pull the MiscRegFile fully into the ISA object.

2009-07-08 23:02:22 -07:00

faults.cc

Stack: Tidy up some comments, a warning, and make stack extension consistent.

2011-09-09 01:01:43 -07:00

faults.hh

Faults: Replace calls to genMachineCheckFault with M5PanicFault.

2011-09-27 00:24:43 -07:00

idle_event.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

idle_event.hh

Put kernel_stats back into arch.

2006-11-07 22:34:34 -05:00

interrupts.cc

Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.

2008-10-12 09:09:56 -07:00

interrupts.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

ipr.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

ipr.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

isa_traits.hh

StaticInst: Merge StaticInst and StaticInstBase.

2011-09-09 02:40:11 -07:00

isa.cc

CPU: Trim unnecessary includes from some common files.

2010-09-14 00:29:38 -07:00

isa.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

kernel_stats.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

kernel_stats.hh

stats: Fix all stats usages to deal with template fixes

2009-03-05 19:09:53 -08:00

kgdb.h

copyright: clean up copyright blocks

2011-06-02 14:36:35 -07:00

locked_mem.hh

O3: Make all instructions that write a misc. register not perform the write until commit.

2010-12-07 16:19:57 -08:00

microcode_rom.hh

CPU: Create a microcode ROM object in the CPU which is defined by the ISA.

2008-10-12 15:59:21 -07:00

mmapped_ipr.hh

Spelling: Fix the a spelling error by changing mmaped to mmapped.

2011-03-01 23:18:47 -08:00

mt.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

osfpal.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

osfpal.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

pagetable.cc

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

pagetable.hh

sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.

2009-02-16 17:47:39 -05:00

predecoder.hh

ARM: Cleanup implementation of ITSTATE and put important code in PCState.

2011-04-04 11:42:28 -05:00

process.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

process.hh

sim: revamp unserialization procedure

2010-08-17 05:17:06 -07:00

registers.hh

Alpha: Fix Alpha NumMiscArchRegs constant.

2010-10-04 11:58:06 -07:00

regredir.cc

Alpha: Missed a file in an earlier changeset.

2009-07-09 00:20:41 -07:00

regredir.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

remote_gdb.cc

Decode: Pull instruction decoding out of the StaticInst class into its own.

2011-09-09 02:30:01 -07:00

remote_gdb.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

SConscript

Alpha: Pull the MiscRegFile fully into the ISA object.

2009-07-08 23:02:22 -07:00

SConsopts

alpha: get rid of all turbolaser remnants

2009-04-08 22:22:49 -07:00

stacktrace.cc

sim: Use forward declarations for ports.

2010-11-08 13:58:22 -06:00

stacktrace.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

system.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

system.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

tlb.cc

Faults: Replace calls to genMachineCheckFault with M5PanicFault.

2011-09-27 00:24:43 -07:00

tlb.hh

Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh.

2011-02-03 21:47:58 -08:00

types.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

utility.cc

Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.

2011-05-13 17:27:00 -05:00

utility.hh

Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.

2011-05-13 17:27:00 -05:00

vtophys.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

vtophys.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00