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38d360a475f0b664a72618bcbdb6365a4450e498
gem5/src/mem/ruby/protocol
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Samuel Stark 38d360a475 configs, mem-ruby: Implement DVMOps in CHI 
1) Handling TLBI/TLBI_SYNC requests from the PE in the CHI Request Node
(Generating DVMOps)

2) Adding a new machine type for the Misc Node (MN) that handles DVMOps
from the Request Node (RN), following the protocol specified within
the Amba 5 CHI Architecture Specification [1]

JIRA: https://gem5.atlassian.net/browse/GEM5-1097

[1]: https://developer.arm.com/documentation/ihi0050/latest

Change-Id: I9ac00463ec3080c90bb81af721d88d44047123b6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57298
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-05-18 08:52:53 +00:00
..
chi
configs, mem-ruby: Implement DVMOps in CHI
2022-05-18 08:52:53 +00:00
Garnet_standalone-cache.sm
mem: Delete authors lists from mem files.
2020-02-17 21:51:08 +00:00
Garnet_standalone-dir.sm
mem: Delete authors lists from mem files.
2020-02-17 21:51:08 +00:00
Garnet_standalone-msg.sm
…
Garnet_standalone.slicc
…
GPU_VIPER-msg.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
GPU_VIPER-SQC.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
GPU_VIPER-TCC.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
GPU_VIPER-TCP.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
GPU_VIPER.slicc
mem-ruby: Add DMA support to MOESI_AMD_Base-dir.sm
2020-06-19 20:34:06 +00:00
MESI_Three_Level_HTM-L0cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MESI_Three_Level_HTM.slicc
mem-ruby: HTM mem implementation
2020-09-08 09:13:30 +00:00
MESI_Three_Level-L0cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MESI_Three_Level-L1cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MESI_Three_Level-msg.sm
mem-ruby: HTM mem implementation
2020-09-08 09:13:30 +00:00
MESI_Three_Level.slicc
…
MESI_Two_Level-dir.sm
mem-ruby: Replace SLICC queueMemory calls with enqueue
2020-04-08 23:40:57 +00:00
MESI_Two_Level-dma.sm
…
MESI_Two_Level-L1cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MESI_Two_Level-L2cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MESI_Two_Level-msg.sm
…
MESI_Two_Level.slicc
…
MI_example-cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MI_example-dir.sm
mem-ruby: fix MI_example functional read
2021-03-01 22:08:25 +00:00
MI_example-dma.sm
…
MI_example-msg.sm
…
MI_example.slicc
…
MOESI_AMD_Base-CorePair.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-dir.sm
mem-ruby: Enhance MOESI_AMD DmaWrite
2022-03-13 15:31:32 +00:00
MOESI_AMD_Base-dma.sm
mem-ruby: Add protocol prints to MOESI_AMD_BASE-dma
2022-02-17 17:03:19 +00:00
MOESI_AMD_Base-L3cache.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-msg.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-probeFilter.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-Region-CorePair.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-Region-dir.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-Region-msg.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-RegionBuffer.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base-RegionDir.sm
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
MOESI_AMD_Base.slicc
…
MOESI_CMP_directory-dir.sm
mem-ruby: replace desks, add desc where required
2021-05-27 23:42:53 +00:00
MOESI_CMP_directory-dma.sm
mem-ruby: Fixed MOESI_CMP_directory resource tracking
2020-05-06 14:42:33 +00:00
MOESI_CMP_directory-L1cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MOESI_CMP_directory-L2cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MOESI_CMP_directory-msg.sm
mem-ruby: fix MOESI_CMP_directory functional reads
2020-05-06 14:42:33 +00:00
MOESI_CMP_directory.slicc
…
MOESI_CMP_token-dir.sm
mem-ruby: Replace SLICC queueMemory calls with enqueue
2020-04-08 23:40:57 +00:00
MOESI_CMP_token-dma.sm
…
MOESI_CMP_token-L1cache.sm
mem-ruby: Fix nonsensical check in MOESI_CMP_token-L1cache
2021-05-20 23:23:42 +00:00
MOESI_CMP_token-L2cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MOESI_CMP_token-msg.sm
…
MOESI_CMP_token.slicc
…
MOESI_hammer-cache.sm
mem-ruby: Move CacheMemory stats used in SLICC to a Stats group
2020-12-22 09:52:36 +00:00
MOESI_hammer-dir.sm
mem-ruby: Replace SLICC queueMemory calls with enqueue
2020-04-08 23:40:57 +00:00
MOESI_hammer-dma.sm
…
MOESI_hammer-msg.sm
…
MOESI_hammer.slicc
…
RubySlicc_ComponentMapping.sm
…
RubySlicc_Defines.sm
mem-ruby: Replace SLICC queueMemory calls with enqueue
2020-04-08 23:40:57 +00:00
RubySlicc_Exports.sm
configs, mem-ruby: Implement DVMOps in CHI
2022-05-18 08:52:53 +00:00
RubySlicc_interfaces.slicc
…
RubySlicc_MemControl.sm
mem-ruby: alternative interface for func. reads
2021-02-19 15:05:10 +00:00
RubySlicc_Types.sm
mem-ruby: Support for unaddressed mem requests in the RubyRequest
2022-04-11 07:31:34 +00:00
RubySlicc_Util.sm
mem-ruby: intToTick helper
2021-02-12 20:31:38 +00:00
SConscript
scons: Put all config variables in an env['CONF'] sub-dict.
2022-03-28 20:31:21 +00:00
SConsopts
scons: Don't accumulate SLICC_INCLUDES.
2022-03-24 22:09:09 +00:00