Giacomo Travaglini 2df87bc1fd dev-arm: Fix GICv3 LPI loop ...

Loop was mistakenly increasing the upper bound of the iteration rather
than the index variable itself.

Change-Id: I0a5a7bc189bc0954a8a6d9581032c2ed902030da
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18590
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2019-05-02 12:44:13 +00:00

..

arch

arch: Stop using TheISA within the ISAs.

2019-04-30 18:52:13 +00:00

base

dev-arm: Correct cast of template parameter

2019-04-01 15:55:58 +00:00

cpu

cpu: alpha: Delete all occurrances of the simPalCheck function.

2019-04-30 07:37:51 +00:00

dev

dev-arm: Fix GICv3 LPI loop

2019-05-02 12:44:13 +00:00

doc

mem: Minimize the use of MemObject.

2019-04-28 01:19:40 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

mem: Minimize the use of MemObject.

2019-04-28 01:19:40 +00:00

kern

arch: cpu: Track kernel stats using the base ISA agnostic type.

2019-04-30 03:49:40 +00:00

learning_gem5

learning_gem5: Fix vector port panic in SimpleCache

2019-04-08 22:51:38 +00:00

mem

mem: Remove the ISA specialized versions of port proxy's read/write.

2019-04-28 03:09:09 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

mem: Minimize the use of MemObject.

2019-04-28 01:19:40 +00:00

sim

sim-se: use DPRINTF_SYSCALL for ioctl/wait4

2019-04-30 04:52:08 +00:00

systemc

systemc: Add a distinct async_request_update mechanism.

2019-04-30 01:27:45 +00:00

unittest

python: Replace dict.has_key with 'key in dict'

2019-02-12 17:36:12 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: fix disable_partial logic for fast binary

2019-03-18 22:22:25 +00:00