Disabling randomization for the memory request and response buffers. CHI requires that memory responses for the same address arrive in the same order the request was sent. Change-Id: Ia4236188679beaf2969978675414a870ccd9f94a Signed-off-by: Tiago Mück <tiago.muck@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63673 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Bobby Bruce <bbruce@ucdavis.edu> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>