Gabe Black 05e580f146 cpu: Eliminate the unused "lane" interface from the ThreadContext. ...

If someone needs to access a component of a vector register, they can do
so through the other interfaces.

Change-Id: Idf1d9b68339eb31b95d4a347548240aa9d2a85cc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41899
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2021-03-09 11:33:24 +00:00

..

arm

cpu: Eliminate the unused "lane" interface from the ThreadContext.

2021-03-09 11:33:24 +00:00

gcn3

arch-gcn3: Fix sign extension for branches with multiplied offset

2021-02-11 20:08:25 +00:00

generic

arch,cpu: Move the inUserMode function to the ISA object.

2021-02-21 10:19:18 +00:00

isa_parser

arch,arch-arm: Eliminate the "zeroing" field of vec reg elements.

2021-03-03 01:06:15 +00:00

mips

arch-mips: Fix a bug in the MIPS yield instruction.

2021-03-06 05:47:29 +00:00

null

arch: Stop using switching header files in ISA specific files.

2021-01-31 10:54:45 +00:00

power

arch,cpu: Move the inUserMode function to the ISA object.

2021-02-21 10:19:18 +00:00

riscv

arch-riscv,misc: Add missing overrides for clang compilation

2021-02-26 18:59:30 +00:00

sparc

arch,cpu: Move the inUserMode function to the ISA object.

2021-02-21 10:19:18 +00:00

x86

arch-x86: Adds rdtscp flag to cpuid for X86KvmCPU

2021-02-23 15:34:18 +00:00

micro_asm_test.py

arch, mem, cpu, systemc: Remove Python 2.7 glue code

2021-01-27 10:18:43 +00:00

micro_asm.py

arch, mem, cpu, systemc: Remove Python 2.7 glue code

2021-01-27 10:18:43 +00:00

SConscript

arch: Get rid of global maximums for numbers of source/dest/misc regs.

2021-02-15 19:21:21 +00:00