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gem5/src/mem/cache
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Alex Richardson 6de0156cf7 mem-cache: Avoid calling .front() on a possibly empty std::list 
In the call to MSHR::promoteWritable() the deferredTargets list can be
empty, so we should check that case before calling .front(). The new logic
matches MSHR::promoteReadable().

Change-Id: Ic1d05e42f32b2c02226ca88d2155225f592f667f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57249
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-02 09:59:59 +00:00
..
compressors
scons: Add sim_object and enums arguments to SimObject().
2021-12-08 08:01:23 +00:00
prefetch
mem-cache: adding round-robin aribitration to multiprefetchers
2022-02-08 16:51:46 +00:00
replacement_policies
mem-cache,tests: Add unit test for ReplaceableEntry
2022-02-09 21:16:35 +00:00
tags
scons: Add sim_object and enums arguments to SimObject().
2021-12-08 08:01:23 +00:00
base.cc
mem-cache: Fix unit inconsistencies in base cache stats
2022-02-27 23:01:03 +00:00
base.hh
mem-cache: Fix unit inconsistencies in base cache stats
2022-02-27 23:01:03 +00:00
cache_blk.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
cache_blk.hh
mem-cache: Ensure all fields of the CacheBlk class are initialized.
2021-11-04 22:53:51 +00:00
cache.cc
mem: implement x86 locked accesses in timing-mode classic cache
2022-01-17 15:15:24 +00:00
cache.hh
mem,gpu-compute: Stop using the GEM5_NO_DISCARD macro.
2021-07-24 21:57:04 +00:00
Cache.py
mem-cache: add option to send pf on hit on pf
2021-07-09 22:30:45 +00:00
mshr_queue.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mshr_queue.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mshr.cc
mem-cache: Avoid calling .front() on a possibly empty std::list
2022-03-02 09:59:59 +00:00
mshr.hh
mem: implement x86 locked accesses in timing-mode classic cache
2022-01-17 15:15:24 +00:00
noncoherent_cache.cc
mem-cache: Set prefetch bit if the blk comes from Prefetch only.
2021-12-22 01:02:22 +00:00
noncoherent_cache.hh
mem,gpu-compute: Stop using the GEM5_NO_DISCARD macro.
2021-07-24 21:57:04 +00:00
queue_entry.hh
mem: implement x86 locked accesses in timing-mode classic cache
2022-01-17 15:15:24 +00:00
queue.hh
misc: Replace type_traits.hh XX::value with XX_v.
2021-07-28 01:48:03 +00:00
SConscript
scons: Add sim_object and enums arguments to SimObject().
2021-12-08 08:01:23 +00:00
write_queue_entry.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
write_queue_entry.hh
misc: Remove sim/cur_tick dependency from sim/core.hh
2021-07-06 09:59:11 +00:00
write_queue.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
write_queue.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00