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  • 13cbd4e94b Merge zizzer:/bk/newmem into zed.eecs.umich.edu:/z/hsul/work/m5/newmem Lisa Hsu 2006-10-30 14:15:50 -05:00
  • 883f0394f5 decouple the switch option from the warmup period option - parsing was confused otherwise, oops. Lisa Hsu 2006-10-30 14:12:15 -05:00
  • bc93802fb8 Use some python os.path stuff to make it more flexible where we can execute this script from. Kevin Lim 2006-10-30 14:01:34 -05:00
  • 9be53b10b3 Merge zizzer:/bk/newmem into zed.eecs.umich.edu:/z/hsul/work/m5/newmem Lisa Hsu 2006-10-30 13:33:38 -05:00
  • b40af2328a add some comments and make the warmup period in a switchover parameterizable. Lisa Hsu 2006-10-30 13:33:27 -05:00
  • 628a3b1d01 An attempt to serialize the state of the micro code mechanism in the simple cpu. Gabe Black 2006-10-29 04:04:50 -05:00
  • 349c7aff9b Move the mem classes into util.isa so that multiple inheritance can be used in the future for micro insts. Gabe Black 2006-10-29 03:40:52 -05:00
  • 6e66de7c75 Fix when the IsDelayedCommit flag is set. Gabe Black 2006-10-29 03:26:41 -05:00
  • 9adba8d98e Bring casa and casxa up to date Gabe Black 2006-10-29 02:57:32 -05:00
  • ce313a15d5 Fixed ldstub to use the right format, and made the load/store operations use the integer microcode register. Gabe Black 2006-10-29 01:59:30 -05:00
  • 6dddca9511 Add an integer microcode register. Gabe Black 2006-10-29 01:58:37 -05:00
  • 61c808ae1c Merge zizzer:/bk/newmem into zeep.pool:/z/saidi/work/m5.newmem.head Ali Saidi 2006-10-28 13:17:05 -04:00
  • 14f53b9b6b remove intel nic from SConscript Ali Saidi 2006-10-28 13:16:53 -04:00
  • ab6b6a9202 This one really needs to be arch/faults.hh Gabe Black 2006-10-28 04:44:05 -04:00
  • 7f1463f94a Include the right version of faults.hh Gabe Black 2006-10-28 04:00:24 -04:00
  • 477693c519 Merge zizzer.eecs.umich.edu:/bk/newmem into zeep.eecs.umich.edu:/home/gblack/m5/newmem Gabe Black 2006-10-28 03:48:23 -04:00
  • 27ef642a76 One last adjustment to get rid of skew in the simple atomic cpu. Gabe Black 2006-10-28 03:44:55 -04:00
  • 2305490de5 Merge zizzer:/bk/newmem into zed.eecs.umich.edu:/z/hsul/work/m5/newmem Lisa Hsu 2006-10-27 16:40:06 -04:00
  • a6fd29ddf9 factor out common run code from se.py and fs.py. Lisa Hsu 2006-10-27 16:32:26 -04:00
  • 8a0c79a315 Merge zizzer:/bk/newmem into zeep.pool:/z/saidi/work/m5.newmem.head Ali Saidi 2006-10-27 09:11:02 -04:00
  • baaadb0d43 add packet_access.hh Ali Saidi 2006-10-27 09:10:50 -04:00
  • a46e19f738 A more complete attempt to fix the clock skew. Gabe Black 2006-10-27 07:09:14 -04:00
  • d5974eff73 Potential fix to clock skew problem. Gabe Black 2006-10-27 06:51:28 -04:00
  • f985b752d3 Merge zizzer.eecs.umich.edu:/bk/newmem into zeep.eecs.umich.edu:/home/gblack/m5/newmem Gabe Black 2006-10-27 02:34:26 -04:00
  • ca34c62bf9 Update stats for fill/spill handlers Gabe Black 2006-10-27 02:21:09 -04:00
  • 709d50cd6b Got rid of some outdated comments. Gabe Black 2006-10-27 01:43:51 -04:00
  • b1cc98ed54 Made the regfile compatible with the new definitions in MiscRegFile Gabe Black 2006-10-27 01:43:26 -04:00
  • 944bfde6b3 Clean up MiscRegFile Gabe Black 2006-10-27 01:36:42 -04:00
  • 2cb190d1e3 Reorganized the MiscRegFile Gabe Black 2006-10-26 22:48:02 -04:00
  • f33bab2386 Cleaned up the decoder slightly. Gabe Black 2006-10-26 22:47:17 -04:00
  • f88b90dd56 Added a few functions to stuff values into bitfields in an instruction. Gabe Black 2006-10-26 20:25:22 -04:00
  • d1b30102fd Changed the number of register windows to be more realistic. Gabe Black 2006-10-26 20:24:01 -04:00
  • 5024b20278 Got rid of some debug output Gabe Black 2006-10-26 20:23:00 -04:00
  • e441be1b82 Change the default function from setMiscRegWithEffect to setMiscReg Gabe Black 2006-10-26 20:22:23 -04:00
  • 2f30c2b4c9 Merge zizzer:/bk/newmem into zed.eecs.umich.edu:/z/hsul/work/m5/clean Lisa Hsu 2006-10-26 16:04:27 -04:00
  • 260b3c0cf0 se.py: make the same os.getcwd fix ali made in fs.py, make connectMemPorts occur after caches are created. Lisa Hsu 2006-10-26 16:04:09 -04:00
  • d626a32c52 Merge zizzer:/bk/newmem into zeep.pool:/z/saidi/work/m5.newmem.head Ali Saidi 2006-10-26 15:49:19 -04:00
  • e912080d12 Merge ktlim@zizzer:/bk/newmem into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem Kevin Lim 2006-10-26 14:37:19 -04:00
  • 6824cdf660 Remove old py file. Kevin Lim 2006-10-26 14:22:46 -04:00
  • f4be29804f Fix simple timing port keep a list of all packets, have only one event, and scan all packets on a functional access. Ali Saidi 2006-10-25 18:34:21 -04:00
  • 93b3176d4e Fixed the priv instruction format. Gabe Black 2006-10-25 17:58:44 -04:00
  • 99d9d40e6c Implemented the saved and restored instructions, fixed up register window instructions so that the cwp is modified at the correct time (when handling the fault), and fixed the "done" instruction. Gabe Black 2006-10-25 17:54:14 -04:00
  • 047455625e Fixed the bitfield FCN to include the right bits. Gabe Black 2006-10-25 17:50:39 -04:00
  • e2eef8859b Implemented the SPARC fill and spill handlers. Gabe Black 2006-10-25 17:49:41 -04:00
  • eda7148af2 Fix fixPacket functionality to calculate sizes properly Ron Dreslinski 2006-10-25 14:14:37 -04:00
  • 1b1495930c Replace the Alpha No op with a SPARC one. Gabe Black 2006-10-24 15:50:41 -04:00
  • 86bd01dfc9 Fix fs.py. Lisa did you test this? Is there some wierd python version thing? Ali Saidi 2006-10-24 13:10:31 -04:00
  • 0f98905ecc Merge zizzer:/bk/newmem into zeep.pool:/z/saidi/work/m5.newmem.head Ali Saidi 2006-10-24 12:59:19 -04:00
  • 650ebe4ec3 Add more traceflags for ethernet Ali Saidi 2006-10-24 12:59:07 -04:00
  • 06482e6eed Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head Steve Reinhardt 2006-10-24 11:50:20 -04:00
  • 3922b2e076 warmup of 1B cpu cycles. Lisa Hsu 2006-10-23 19:32:57 -04:00
  • 764f27a0c9 Merge zizzer:/bk/newmem into zed.eecs.umich.edu:/z/hsul/work/m5/newmem Lisa Hsu 2006-10-23 18:46:05 -04:00
  • 4da3938ed9 get rid of the "resume" step at the end of changeToTiming/Atomic because this will cause an assertion when you do the CPU switch. instead, push the responsibility of the resume upwards towards the user - documented in se.py and fs.py so it should be ok. Lisa Hsu 2006-10-23 18:45:30 -04:00
  • 0a2387f38c make this parallel to the other cpu types so that resume works correctly. Lisa Hsu 2006-10-23 18:43:56 -04:00
  • 049f8d53a9 make a lot of the same changes as to fs.py for checkpointing. Lisa Hsu 2006-10-23 18:42:46 -04:00
  • 40a04f2f40 changes regarding fs.py Lisa Hsu 2006-10-23 18:07:51 -04:00
  • ce4531c079 Merge ktlim@zizzer:/bk/newmem into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem Kevin Lim 2006-10-23 14:32:35 -04:00
  • 4ccccfef71 Fix fetch to stop fetching upon encountering a fault in SE mode. Also change warning to a DPRINTF. Kevin Lim 2006-10-23 14:10:37 -04:00
  • 1926faac06 Add in support for LL/SC in the O3 CPU. Needs to be fully tested. Kevin Lim 2006-10-23 14:00:07 -04:00
  • ef8b7713ca Minor compile fix. Not sure why this is broken. Gabe Black 2006-10-23 11:17:59 -04:00
  • 18b2d94b8c Move around more SPARC memory code, and make block memory operations work with the timing cpu Gabe Black 2006-10-23 11:17:15 -04:00
  • 466c387318 Merge zizzer.eecs.umich.edu:/bk/newmem into zeep.eecs.umich.edu:/home/gblack/m5/newmem Gabe Black 2006-10-23 09:44:58 -04:00
  • 274d2670a1 Add reference outputs for SPARC on the atomic timing cpu model Gabe Black 2006-10-23 07:57:16 -04:00
  • 20208d00e6 Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description. Gabe Black 2006-10-23 07:55:52 -04:00
  • e9908e3c85 Don't let interupts interupt microcode at undesired points. Gabe Black 2006-10-23 02:39:02 -04:00
  • a8973c6054 Files in base shouldn't depend on things in sim. Changed "sim/host.hh" to <inttypes.hh> Gabe Black 2006-10-23 02:37:54 -04:00
  • f31d73a433 Start making memory ops work with InitiateAcc and CompleteAcc, and some minor cleanups Gabe Black 2006-10-23 02:36:46 -04:00
  • 3d6ff82552 Change the default constructors to take ExtMachInsts rather than regular MachInsts Gabe Black 2006-10-23 02:32:58 -04:00
  • e321a21e27 Clean up cache DPRINTFs Steve Reinhardt 2006-10-22 21:07:38 -07:00
  • 1b21d9ba5e s/pktuest/request/ (all in comments) Steve Reinhardt 2006-10-22 20:38:34 -07:00
  • 199084b339 Add DPRINTF for non-timed quiesce. Steve Reinhardt 2006-10-22 16:22:45 -07:00
  • d2856c2fde Add mutex test to Benchmarks.py. Steve Reinhardt 2006-10-22 12:52:58 -04:00
  • 968311d096 Another missing case in a switch (like Nate's earlier fix). Steve Reinhardt 2006-10-22 12:51:49 -04:00
  • 810dee6e98 Have tracediff print warning if no traceflags are set. Elaborate on description a bit. Steve Reinhardt 2006-10-22 12:51:00 -04:00
  • 5e2263fc52 Small bug fixes for timing LL/SC. Better now but not necessarily 100% there yet. Steve Reinhardt 2006-10-21 23:35:00 -07:00
  • 0159529343 Add Quiesce trace flag to track CPU quiesce/wakeup events. Steve Reinhardt 2006-10-21 23:32:14 -07:00
  • 883ed108e4 Just give up if a store conditional misses completely in the cache (don't treat as normal write miss). Steve Reinhardt 2006-10-21 17:19:33 -07:00
  • 82e90bf5e0 Fix formatting that got screwed up when tabs were removed. Steve Reinhardt 2006-10-21 13:54:48 -07:00
  • 1e6aa0d0d0 Refactor coherence state table initialization. Steve Reinhardt 2006-10-21 13:43:14 -07:00
  • fdad936f79 Merge vm1.(none):/home/stever/bk/newmem-head into vm1.(none):/home/stever/bk/newmem-llsc Steve Reinhardt 2006-10-21 11:41:53 -07:00
  • e70f5507e2 Get rid of unused handleTargets() function. Steve Reinhardt 2006-10-21 11:38:23 -07:00
  • 3ac1ca8ff6 Tweak a few things for better page fault debugging. Steve Reinhardt 2006-10-21 05:28:05 -04:00
  • 0e121bc14f Updated to work with new command line argument ordering. Note that command line syntax has totally changed as a result. See comments for more details. Steve Reinhardt 2006-10-21 02:24:27 -07:00
  • 5e34c3fe13 Merge zizzer.eecs.umich.edu:/bk/newmem into iceaxe.:/Volumes/work/research/m5/incoming Nathan Binkert 2006-10-21 00:32:09 -07:00
  • dff1a022b8 Missing case Nathan Binkert 2006-10-21 00:31:46 -07:00
  • 30cd2298df Add some default options, point it to the /dist version of the splash benchmarks Ron Dreslinski 2006-10-20 21:13:10 -04:00
  • e855a7e6f2 Merge zizzer:/bk/newmem into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest Ron Dreslinski 2006-10-20 20:04:45 -04:00
  • e198e58e1e Clean up splash2 so it works in v2.0 Ron Dreslinski 2006-10-20 19:53:52 -04:00
  • 0b5cf4ba6e Merge zizzer.eecs.umich.edu:/bk/newmem into zeep.eecs.umich.edu:/home/gblack/m5/newmem Gabe Black 2006-10-20 16:39:47 -04:00
  • 6c6b78126a Construct a correct value of PYTHONHOME from the interpreter running SCons, make it into a sticky option that can be overridden at build time, and set it up before the interpreter is started. Also, fix the code that turns sticky options into config/*.hh so that it works with types other than bool. Nathan Binkert 2006-10-20 11:37:59 -07:00
  • ad783962c5 Give physical memory some latency to stress the system Ron Dreslinski 2006-10-20 13:36:26 -04:00
  • 316e0fa879 Add a config file in the example with the memtester and some parser options. Ron Dreslinski 2006-10-20 13:32:24 -04:00
  • ba24ce6bb6 Get rid of a variable put back by merge. Ron Dreslinski 2006-10-20 13:05:39 -04:00
  • 54ed57cc4c Merge zizzer:/bk/newmem into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest Ron Dreslinski 2006-10-20 13:04:59 -04:00
  • 28e9641c2c Use fixPacket function everywhere. Fix fixPacket assert function. Stop timing port from forwarding the request if a response was found in its queue on a read. Ron Dreslinski 2006-10-20 13:01:21 -04:00
  • 7be58fd5f4 Merge zizzer:/bk/newmem into zeep.pool:/z/saidi/work/m5.newmem.head Ali Saidi 2006-10-20 13:00:15 -04:00
  • 32384b2f6b still working on getting past initialization Ali Saidi 2006-10-20 13:00:05 -04:00
  • a4c6f0d69e Use PacketPtr everywhere Nathan Binkert 2006-10-20 00:10:12 -07:00
  • 7245d4530d refactor code for the packet, get rid of packet_impl.hh and call it packet_access.hh and fix the #includes so things compile right. Nathan Binkert 2006-10-19 23:38:45 -07:00
  • 5b246a0567 initialize end, clean up loop Nathan Binkert 2006-10-19 23:35:59 -07:00