Small bug fixes for timing LL/SC. Better now but
not necessarily 100% there yet.
src/mem/cache/cache_impl.hh:
Generate response packet on failed store conditional.
src/mem/packet.hh:
Clear packet flags when reinitializing.
(SATISFIED in particular is one we don't want to leave set.)
--HG--
extra : convert_revision : 29207c8a09afcbce43f41c480ad0c1b21d47454f
This commit is contained in:
7
src/mem/cache/cache_impl.hh
vendored
7
src/mem/cache/cache_impl.hh
vendored
@@ -232,7 +232,12 @@ Cache<TagStore,Buffering,Coherence>::access(PacketPtr &pkt)
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}
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}
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if (!(pkt->flags & SATISFIED)) {
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if (pkt->flags & SATISFIED) {
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// happens when a store conditional fails because it missed
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// the cache completely
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if (pkt->needsResponse())
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respond(pkt, curTick+lat);
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} else {
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missQueue->handleMiss(pkt, size, curTick + hitLatency);
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}
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@@ -310,6 +310,7 @@ class Packet
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* multiple transactions. */
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void reinitFromRequest() {
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assert(req->validPaddr);
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flags = 0;
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addr = req->paddr;
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size = req->size;
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time = req->time;
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