Commit Graph

16453 Commits

Author SHA1 Message Date
Gabe Black
a4e5d2cbb9 scons: Stop auto including the git tool from the default too override.
SCons has a system of "tools", which basically detect versions of build
tools (compilers, linkers, etc) and set up an environment with the
appropriate build variable substitutions for that tool to be used.

For instance, there would be a "tool" for gcc, and it would detect if
gcc is present on the system, and if so would set the "CC" variable to
"gcc". An actually tool as defined by SCons would be a lot more
sophisticated than that and set more variables, but that's the basic
idea.

To help modularize the gem5 SConstruct file, I moved code which would
set up git commit hooks into a "tool" which helped modularize it and
reduce the size of SConstruct.

This isn't quite right since, while the code does detect if git was
used to check out the source (if there is a .git file at the root), it
doesn't really modify the environment at all. It will also be invoked
every time any environment is set up, although right now that will only
be the DefaultEnvironment, what's used when loose functions like
Builder or Command are called with, and the "main" environment which
all the others are Clone-d from.

Normally, when SCons sets up a new environment, either implicitly or
when Environment() is called, it sets up a bunch of built in tools
which are fixed within SCons itself. If you want, you can add a "tools"
argument to Environment (or to the DefaultEnvironment() function) which
will replace that list of tools. That can be used to make an
environment use the new "git" tool, but it isn't automatic.

SCons also lets you override default tools by creating your own with
the same name as the default. To make loading the git tool automatic,
I added an override "default" tool which, in addition to setting some
defaults which should apply to all environments, also pulled in other
tools, at that time "git" and "mercurial" (RIP).

Unfortunately, that meant that today, apparently particularly with
SCons version 4, *any* Environment would pull in "git", and all of
"git"'s dependencies, even if SCons wasn't set up enough for those to
work.

To break that dependency, this change stops the default tool from
automatically loading the git tool, although it does continue to set
other defaults which have very minimal external dependencies. When
creating the "main" Environment in the SConstruct, the "git" tool is
now added in explicitly. Since the list of tools replaces the original
and doesn't extend it, we have to add in "default" explicitly as well.

Really, the "git" tool should be converted from the tool interface into
something more appropriate, like perhaps a small module under
site_scons which site_init.py can import and call. When that happens,
main can be declared like normal again.

While making this change, I also got rid of a few nonstandard additions
to the main environment that were little used and not really necessary.
When reading the SConstruct, it wasn't very obvious where those extra
values were coming from, and they didn't really add any value.

Change-Id: I574db42fc2196bf62fc13d6754357c753ceb9117
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38616
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-21 21:53:33 +00:00
Bobby R. Bruce
79ed97f37b util,python: Updated maintainers.py to fix deprecation warning
The following warning was being thrown:

```
util/maint/lib/maintainers.py:120: YAMLLoadWarning: calling yaml.load() without Loader=... is deprecated, as the default Loader is unsafe. Please read https://msg.pyyaml.org/load for full details.
```

This is fixed by adding `Loader=yaml.SafeLoader` when calling
`yaml.load()`.

Change-Id: I3b79115379a45409967a8848175658ab3c13bfc7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38476
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-18 22:26:05 +00:00
Bobby R. Bruce
9c556e7935 util,python: Updated git-pre-commit.py to use Python3
Change-Id: I3897a57237637a55e75b3c9c4cb43918b39cf7d0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38475
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-18 22:26:05 +00:00
Gabe Black
150fef8453 dev: Use BitUnions and a RegisterBank in the Uart8250.
Change-Id: I139db4f08f9e6addfed4906ea6c49ee67439d30e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36818
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-18 00:30:55 +00:00
Gabe Black
3eb63b688f x86: Fix some comments in x86 KVM process initialization.
These comments did not reflect what the code was actually doing.

Change-Id: I2bcd23bd68c870e364bdfd0b9b0eb5dcb560e713
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38537
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-17 03:30:20 +00:00
Gabe Black
aad4ee30c4 x86: Change some CR0 settings when setting up kvm x86 processes.
These values were (seemingly) arbitrarily changed from the original,
non-KVM settings, and no longer matched the comments which were also
copied over. These two bits enable alignment checking on memory accesses
(not normally used on x86), and whether kernel code can write to read
only pages.

Change-Id: I48e560e448e4849607f12e9336d1ab0458ad9407
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38536
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-17 03:30:01 +00:00
Gabe Black
cc0d4a8fd6 arm: Fix style in the ISA templates.
Change-Id: I3014d26c8649efaf6227f2e3a798cc6c4183a0c5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38379
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-16 13:19:21 +00:00
Daniel R. Carvalho
491b9874d2 mem-cache: Implement a frequency-sampling compressor
Implementation of a generic frequency-based sampling
compressor. The compressor goes through a sampling stage,
where no compression is done, and the values are simply
sampled for their frequencies. Then, after enough samples
have been taken, the compressor starts generating
compressed data.

Compression works by comparing chunks to the table of
most frequent values. In theory, a chunk that is present
in the frequency table has its value replaced by the
index of its respective entry in the table. In practice,
the value itself is stored because there is no straight-
forward way to acquire an index from an entry.

Finally, the index can be encoded so that the values
with highest frequency have smaller codeword representation.
Its Huffman coupling can be used similar to the approach
taken in "SC 2 : A Statistical Compression Cache Scheme".

Change-Id: Iae0ebda08e8c08f3b62930fd0fb7e818fd0d141f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37335
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-16 12:13:05 +00:00
Daniel R. Carvalho
32bce3301d mem-cache: Add a data-update probe to cache
This probe is responsible for notifying any changes to the
data contents of a block. This includes fills, overwrites,
and invalidations/evictions.

Jira: https://gem5.atlassian.net/browse/GEM5-814

Change-Id: I1ff3c09c63d5402765c2125c4d76d95b614877d6
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37096
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-16 12:13:05 +00:00
Daniel R. Carvalho
9388ec18a4 sim: Add a listener checker to probes
Add a function to check if a probe has listeners. This can be
used to avoid performing costly tasks when no one is listening.

Change-Id: I8996a0ea298cb7cf97ac8aa9e627331a22bea26e
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38175
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-12-16 12:13:05 +00:00
Adrian Herrera
275a6ecefe util: m5ops, optional extra build flags
This increases compilation control for users. Main use case is building
m5ops as part of an image distribution. Specifying a different sysroot
or dynamic linker may be required when the cross toolchain is built as
part of the process.

Change-Id: Icbd3faa92ea6e084fc4a9b2db83129bce73faf21
Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38416
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-16 09:05:05 +00:00
Gabe Black
c29457b7a0 x86: Use the right register type when initializing x86 kvm processes.
Functionally this doesn't matter, since no bitfields are used in the
type and it devolves into just being a uint64_t, but we should use CR8
and not CR4 when initializing the CR8 register.

Change-Id: Ifc7dc9072d552f7010afce9115427c8ed624ebb9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38535
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
2020-12-16 09:03:48 +00:00
Gabe Black
2a0867f51c x86: Set the effective base of the TSS when initializing a process.
For some segments, there are two base registers. One is the
architecturally visible base, and the other is the effective base used
when actually referencing memory relative to that segment. The process
initialization code was setting the architecturally visible base,
presumably because that's the value used by KVM, but was setting the
effective base to zero.

Change-Id: I06e079f24fa63f0051268437bf00c14578f62612
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38488
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-16 06:44:36 +00:00
Gabe Black
4110ee2088 x86: Some small style fixes in arch/x86/process.hh.
Moved two single line functions to be all on one line, and added some
consts.

Change-Id: Iecfa3a9c2bde69ce2f26e9531864a7cb92b0a1df
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38489
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-16 00:47:58 +00:00
Gabe Black
09982dcbe9 x86,sim: Remove special handling for KVM in the clone syscall.
When a gem5 op is triggered using a KVM MMIO exit event, the PC has
already been advanced beyond the offending instruction. Normally when
a system call or gem5 op is triggered, the PC has not advanced because
the instruction hasn't actually finished executing. This means that if
a gem5 op, and by extension a system call in SE mode, want to advance
the PC to the instruction after the gem5 op, they have to check whether
they were triggered from KVM.

To avoid having to special case these sorts of situations (currently
only in the clone system call), we can have the code which dispatches to
gem5 ops from KVM adjust the next PC so that it points to what the
current PC is. That way the PC can be advanced unconditionally, and will
point to the instruction after the one that triggered the call.

To be fully consistent, we would also need to adjust the current PC.
That would be non-trivial since we'd have to figure out where the
current instruction started, and that may not even be possible to
unambiguously determine given x86's instruction structure. Then we would
also need to restore the original PC to avoid confusing KVM.

Change-Id: I9ef90b2df8e27334dedc25c59eb45757f7220eea
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38486
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-15 01:36:39 +00:00
Gabe Black
4db903a59f sim: Remove full system checks from some pseudo insts.
These pseudo insts are less useful outside of full system, but they
should all still work. Removing this check makes it possible to, for
instance, test them in syscall emulation mode, and removes another
difference between the two styles of simulation.

Change-Id: Ia7d29bfc6f7c5c236045d151930fc171a6966799
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38485
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-15 01:35:52 +00:00
Daniel R. Carvalho
9c235d19b0 mem-ruby: Fix const copy of addr range in AbstractController
Clang 10 throws the following error:
  loop variable 'addr_range' of type 'const AddrRange' creates a
  copy from type 'const AddrRange' [-Werror,-Wrange-loop-construct]

  note: use reference type 'const AddrRange &' to prevent copying

Issue introduced by c7fabb979c.

Change-Id: I43e8d613eb5069d5ce9cb12ddec18cba0a3847f6
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38495
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-14 11:50:26 +00:00
Yu-hsin Wang
0978681728 mem: Align the Substream naming in Request
Change-Id: Iac6a18d8872c7df4ade8ecf8914fa807cc3584e3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38457
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-14 01:49:06 +00:00
Yu-hsin Wang
568184b83c mem: Change assert to use flag test functions in Request
Change-Id: Id999d39959557196877be9b6469be332391c7dae
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38456
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-14 01:49:06 +00:00
Yu-hsin Wang
16cfdb687e mem: Add missing flag test functions to Request
Change-Id: I800c45c855332a2dd1ec5f31b135db62181e5204
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38455
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-14 01:49:06 +00:00
Mahyar Samani
5b1ebd87e1 cpu: Update stats for LTAGE bpred
Updated stats in ltage.hh and ltage.cc to use new style stats.

Change-Id: I5f676381fce6f3a0b6abc6044577540e561dcd7b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36335
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-13 09:27:59 +00:00
gauravjain14
fd039eba20 gpu-compute: Number of TLBs equal to number of CUs
The n_cu variable in GPUTLBConifig.py did not take
the number of CUs into consideration and instead
calculated the number of TLBs using cu_per_sa,
sa_per_complex, num_gpu_complexes. Thus changing
the number of cus (n_cus) and none of the other flags
resulted in a  segmentation fault since the required
TLBs were not being instantiated

Change-Id: I569a4e6dc7db9b7a81aeede5ac68aacc0f400a5e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32035
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-11 05:03:40 +00:00
mupton
7fba0fb207 arm,kvm: missed rename of MISCREG_HYP in kvm/armv8_cpu.cc
A recent checkin changed the names of some of the MISCREGs.
One of them was missed and wont compile. This fixes to the new name.

Change-Id: I746f9dea44bc50819a0d30f62dcc3a46380f80c2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38358
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-11 04:36:52 +00:00
Mahyar Samani
cf222d94e3 cpu,stats: Update stats for tage_sc_l to new style stats
Updated tage_sc_l.hh and tage_sc_l.cc to use new style stats.

Change-Id: If172c95bb728c7c3748269469781212ef1da6f32
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36336
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-by: Trivikram Reddy <tvreddy@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-10 15:36:09 +00:00
Gabe Black
742acde59a util: Add a simple junit test for the gem5 ops java wrapper.
If possible, this gets built into the jar which also holds the wrapper.
It can be run on its own through its own main function, or through the
junit mechanism directly.

Change-Id: Iaec7f6deb26bbad75da027c71edca50ef25697cf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28181
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2020-12-10 11:20:00 +00:00
Gabe Black
97aa8425d6 util: Rework some checks in the m5 util scons to use Configure().
This is the official scons way to check for things on the system. This
adds two custom checks, one for java packages and one for pkg-config
packages. This change also adds a check for the org.junit java package
which is/will be used for a test for the java wrapper.

Change-Id: I59ca559f257a4c671e9b72a50b5635b5eb61ee69
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28180
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2020-12-10 11:19:49 +00:00
Hoa Nguyen
6c07c011f5 base-stats: Print the name of stats sharing the same name
Having stats of the same name within the same group result in an error.
This commit adds the name to the error message to make it easier to find
the Stats::Group caused the error.

Change-Id: I4010d5d949d1c943d2dd1e2fca0aafcbf62e3ee1
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38337
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-10 05:19:37 +00:00
Adrian Herrera
55584fb6b9 util: term, remove install target
Installing the term utility within the host filesystem is an unlikely
scenario. Most times, the utility will be used in place or trivially
copied to a local directory within the PATH.

Furthermore, the install target hardcoded a privileged installation,
which is a non-standard and insecure technique.

Change-Id: I1592a304017c6b24a9421aa353229fb5a5baae43
Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38415
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-09 12:05:58 +00:00
Bobby R. Bruce
350cd7bb89 tests,arch-gcn3,arch-x86: Changed X86 testlib tests to GCN3_X86
In an effort to get better test coverage, we've changed all X86 tests to
use GCN3_X86. This will, as a minimum, ensure that GCN3 is regularly
compiled. GCN3_X86 is a superset of X86 and all X86 tests should pass on
GCN3_X86.

Change-Id: I2684edfc4e48c3e311a400231293a9e04c701130
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38279
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-08 21:06:26 +00:00
Bobby R. Bruce
9e03d3bb5d tests: Standardized used of the ISA constants tags
Change-Id: I4a3966168a1d159bf4ac4cc3148e9c7a43c880e3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38278
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-08 21:06:26 +00:00
Bobby R. Bruce
0ed320747f tests,misc: Removing cloudbuild_presubmit.yaml
This is not used. It can be removed.

Change-Id: I2e25a5407ca70a18b4e619f4e65b69b98c873511
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38375
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-08 20:33:02 +00:00
Giacomo Travaglini
b72246d0ef cpu: MinorCPU not updating cycle counter value
By not updating the cycle counter value for every tick in the
MinorCPU meant that a read to the associated performance counter
was always returning 0.

For more info check the following email thread in gem5-users:

https://www.mail-archive.com/gem5-users@gem5.org/msg18742.html

Change-Id: Ibc033b536669cbb43d40c8a7c0659eb5565bdf93
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38095
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2020-12-08 09:49:29 +00:00
Hoa Nguyen
6d6e3ab542 util: More doc for the Gerrit bot, add padding time to query age
The following changes were made:
- Improve the wording of comments in the Python files and of the
documentation in the README file.
- Add 10 seconds to the query age so that the bot wouldn't miss
any new changes that could be missed due to time difference between
the Gerrit server and the bot.

Change-Id: Ic75f9572653a248230a8b4b0bd360a8d22efd371
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38155
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2020-12-08 07:32:26 +00:00
Tiago Mück
4e2216d68b mem-ruby: able to define resource stalls handlers
Input ports can specify a custom handler that is called
on resource stalls. The handler should return 'true' to
indicate the stall was handled and new messages from that
queue can be processed on that cycle. When it returns
'false' or no handler is defined, a resource stall is
generated.

Handlers are defined using the 'rsc_stall_handler' (for
resource stalls) and the 'prot_stall_handler' (for
protocol stalls) parameters. For example:

in_port(mandatory_in, RubyRequest, mandatoryQueue,
        rsc_stall_handler=mandatory_in_stall_handler) {
    ...
}

bool mandatory_in_stall_handler() {
    // Do something here to handle the stall !
    return true;
    // or return false if we don't want to do anything
}

Note: this patch required a change to the generate()
functions interface in the SLICC compiler, so we
could propagate a reference to the in_port to the
appropriate generate() functions. The updated interface
allows passing and forwarding of keyword arguments.

Change-Id: I3481d130d5eb411e6760a54d098d3da5de511c86
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31265
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-07 19:53:43 +00:00
Tiago Mück
ca29eef37e configs,tests: use Sequencer port connect methods
This patch updates Ruby configuration scripts to use the functions
defined in the RubySequencer python object to connect to cpu ports.

Only the protocol-agnostic scripts were updated. Scripts that assume
a specific protocol (e.g. configs/example/apu_se.py, gpu tests, etc)
and scripts in which the obj connected to the RubySequencer is not a
BaseCPU (e.g. the tests scripts) were not changed as they require a
non-standard port wireup.

Change-Id: I1e931ff0fc93f393cb36fbb8769ea4b48e1a1e86
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31418
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-07 19:52:22 +00:00
Tiago Mück
4f48530129 mem-ruby: functions for connecting sequencer ports
Added functions for connecting the sequencer and cpu ports.
Using these functions instead of wiring up the ports directly allow
protocols to provide specialized sequencer implementations. For
instance, connecting the cpu icache_port and dcache_port to
different sequencer ports or to different sequencers.

A follow-up patch will update the configurations to use these
functions.

Change-Id: I2d8db8bbfb05c731c0e549f482a9ab93f341474b
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31417
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-07 19:52:22 +00:00
Gabe Black
29bac1c422 riscv: Convert RISCV to use local reg index storage.
This was mostly straightforward, except that the micro and macro op
classes need to be seperated for AMO classes so that the reg_idx_arr_decl
will have the right sizes.

Change-Id: Ibc0a9df0cb79924342eaceb0f09606913442f841
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36881
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-06 23:09:00 +00:00
Gabe Black
3ac80f9f55 util: Make running m5 util unit tests opt-in.
These tests don't run reliably right now for a few reasons, including
problems with QEMU, and apparently inaccurate information from g++-s
--print-sysroot option.

This may be revisited in the future if those problems can be sorted out.
For now, avoid tripping up new people who won't know to (or how to) work
around those sorts of errors.

Change-Id: Ide42e6c6b27159ff146b8495ae568d1fd377f4f4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28179
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 22:57:35 +00:00
Gabe Black
a5f929357d util: Break out the dispatch tables in the m5 util call types.
These dispatch tables will be useful in the java and lua wrappers as
well, since those should also support the alternative call methods.

Change-Id: Ib3be510c99b04960eb2efbc732aebe3165882bee
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28178
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 22:57:17 +00:00
Gabe Black
aaf7678670 util: Automatically load the java .so in the gem5 ops wrapper.
The java wrapper which provides access to the gem5 ops is implemented
using JNI in a .so file which needs to be loaded before the class can be
used. Rather than expecting the caller to do that, we can use a static
block in the class definition. We know that will be called at the right
time, and it's one less detail (arguably an implementation detail) that
the caller won't have to worry about.

Change-Id: I2b4b18ebb12030ea6f4e6463c6cd512afed74cfd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28177
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 22:57:00 +00:00
Gabe Black
666b7904e6 util: Reorganize the java wrapper for gem5 ops.
Rather than use a top level package of jni which is generic, switch to a
top level package of "gem5". With that prefix, call the actual class
Ops, which is capitalized according to Java tradition and also
unambiguous given its package name.

Also move the java class definition and c JNI implementation into a java
subdir to keep it all together. The java related output will now be in
out/java for the same reason.

Change-Id: Ia0468d2edbcffe87a62022898f867ae391adc94c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28176
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 22:56:24 +00:00
Gabe Black
bd7ac98819 util: Add the "sum" method to the java and lua m5 util wrappers.
Change-Id: Id55dec87af3e0fc89da6c5471a2aa02443063108
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28175
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2020-12-04 22:55:57 +00:00
Daniel Gerzhoy
65f63e7b69 cpu-o3: Fixed halt assertion failure
Halting the O3 CPU would cause an assertion failure because
instructions were not finished being squashed in the ROB.

Change-Id: I8b8c375d0e520861af3657249de987de2451b6f1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37676
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 14:09:59 +00:00
Gabe Black
671d089676 util: Link m5_mmap into the JNI shared library for the m5 util.
Change-Id: I6849a547e9150417a09f7a0efc73ebf032e44f3a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28174
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 11:14:15 +00:00
Gabe Black
87e3a8543d util: Rename the aarch64 m5 util version to arm64.
Change-Id: I0ab0c4af0b24a4934b059d934fce237eeab839da
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27757
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2020-12-04 11:13:50 +00:00
Gabe Black
6e0f211046 util: Add a --verbose flag to the m5 util's scons.
Like gem5's own verbose scons flag, when this isn't provided, the output
is very brief and just shows what is being built and by what type of
process. When it is provided, the full command lines are printed.

This is less fancy than the version gem5 has, but I didn't want to
duplicate all that code. We should find a way to share that and other
functionality between different sets of scons scripts.

Change-Id: Id9973b57a1270ec8b364efd2aa67d49b0fb82a9d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27756
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 11:08:08 +00:00
Gabe Black
385bbc863e util: Add a --no-test-xml option to the m5 util's scons.
This forces the test XML output files to be omitted from the build. This
lets you run scons build/ to build everything without running any tests,
and can be used to verify that everything builds correctly even if the
tests don't run/pass.

Change-Id: I280ffe4e76b2249912f9a51a414f4058a3643229
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27755
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-12-04 11:07:36 +00:00
Adrian Herrera
db95ccffe9 util: m5term, fix LDFLAGS, standard make variables
Enables build systems to provide necessary flags to build m5term.
Useful specially if a different linker is intended to be used.

Change-Id: If7f867cc0965d6ad4627b5421e00a99cc3d64989
Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38256
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 09:05:22 +00:00
Gabe Black
e4b6a03c4d util: Pass TERM through to commands in the m5 util's scons.
This enables color output from commands since they can detect that the
terminal supports it.

Change-Id: I4bbf400dccb8c6bfe92459a9db812e06e5a69b5a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27754
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
2020-12-04 06:30:06 +00:00
Gabe Black
a1a1adf3bd util: Add a --debug-build option to the m5 util scons.
This enables debug info with -g, and disables optimization with -O0.

Change-Id: I788585c379f048d373c54dc04e7c460914d6912e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27753
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-04 06:29:55 +00:00