Commit Graph

964 Commits

Author SHA1 Message Date
Daniel R. Carvalho
4f480fc6fc base: Remove the Stats namespace
This namespace has gone through the deprecation period
and can now be removed.

Change-Id: I80f25af68e03fff3df8316cb4d1d2669687d0fe4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67359
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-01-17 09:16:20 +00:00
Hoa Nguyen
49ac00d060 stdlib: Fix errors in MESI_Three_Level_Cache_Hierarchy
Change-Id: I60ae47f4336cb1b54bcca3fce3bdd13858daa92a
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66771
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-01-04 02:36:33 +00:00
Bobby R. Bruce
bbeec2d758 misc: Update version info for develop branch
Change-Id: Icd409acda0e88852938b2af9f170e2a410e91f8c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67053
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-01-03 22:08:08 +00:00
Bobby R. Bruce
218b3925be misc: Merge branch stable into develop branch
This ensures both branches are in-sync and have not diverged.

Change-Id: Ib487d8596037017b9ec03d7e8a76229373c153db
2022-12-30 20:43:00 +00:00
Bobby R. Bruce
1e73beb620 python: Remove 'scheduleTickExit' in favor of 'exitSimLoop'
The commit https://gem5-review.googlesource.com/c/public/gem5/+/66231
added an API to m5 for scheduling to-tick exit events. This added the
function `schedule_tick_exit`. It was later pointed out that this
`schedule_tick_exit` event is redundant given the existance of
`exitSimLoop`. This patch therefore removes `schedule_tick_exit` in
favor of `exitSimLoop`.

Change-Id: Ibecf00b98256a5da2868427d766bdc93f03c3f97
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66511
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-12-06 22:41:58 +00:00
Bobby R. Bruce
ae20719576 python: Remove 'scheduleTickExit' in favor of 'exitSimLoop'
The commit https://gem5-review.googlesource.com/c/public/gem5/+/66231
added an API to m5 for scheduling to-tick exit events. This added the
function `schedule_tick_exit`. It was later pointed out that this
`schedule_tick_exit` event is redundant given the existance of
`exitSimLoop`. This patch therefore removes `schedule_tick_exit` in
favor of `exitSimLoop`.

Change-Id: Ibecf00b98256a5da2868427d766bdc93f03c3f97
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66451
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2022-12-06 18:04:46 +00:00
Bobby R. Bruce
7185c9ea19 stdlib: Update the gem5 resources' version to "v22.1"
This is required to ensure the correct version of the resources are
obtained for this version of gem5.

Change-Id: If316081c776d510ec9a2f7ff9e077a1f837d2d2e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65915
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-12-05 20:25:53 +00:00
Bobby R. Bruce
005049f548 stdlib,python: Allow setting of to tick exits via m5
This commit adds the following functions to the `m5` python module:

- setMaxTick(tick) -> None
- getMaxTick() -> int
- getTicksUntilMax() -> int
- scheduleTickExitFromCurrent(tick, exit_string) -> None
- scheduleTickExitAbsolute(tick, exit_string) -> None

Until this patch the only way to set an exit at a particular tick was
via `simulate.run` which would reschedule the maximum tick. This
functionality has been explicity exposed via the new `setMaxTick`
function. However, as this is only rescheduling the maximum tick, it
stops scheduling exits at multiple different ticks.

To get around this problem the `scheduleTickExit` functions have been
added. These allow a user to schedule multiple exit events. The
functions contain a `exit_string` parameter that provides the string
the simulator is to return when the specified tick is met. By default
this string is "Tick exit reached" which is used by the stdlib
Simulator module to declare a new `SCHEDULED_TICK` exit event (Note:
this has been deliberatly kept seperate from the `MAX_TICK` exit event.
This commit serves as an attempt to decouple these are two concepts).

Tests are provided in this patch to ensure these new functions work as
intended.

Additional notes:
- The `simulate` function has been fixed to match the documentation. If
  the `num_cycles` is -1 then the maximum ticks is set to MaxTicks.
  Otherwise the max ticks is set to `curTicks() + num_cycles`. The
  functionality of this function will remain unchanged to the end-user.
- Full integration into the Simulator module is not complete as of this
  patch. Users must us the m5 python module to set these exit events.

Change-Id: I6c92b31dd409dc866152224600ea8166cfcba38b
Issue-on: https://gem5.atlassian.net/browse/GEM5-1131
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66231
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66331
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-12-02 17:24:04 +00:00
Bobby R. Bruce
8479a691aa stdlib,python: Allow setting of to tick exits via m5
This commit adds the following functions to the `m5` python module:

- setMaxTick(tick) -> None
- getMaxTick() -> int
- getTicksUntilMax() -> int
- scheduleTickExitFromCurrent(tick, exit_string) -> None
- scheduleTickExitAbsolute(tick, exit_string) -> None

Until this patch the only way to set an exit at a particular tick was
via `simulate.run` which would reschedule the maximum tick. This
functionality has been explicity exposed via the new `setMaxTick`
function. However, as this is only rescheduling the maximum tick, it
stops scheduling exits at multiple different ticks.

To get around this problem the `scheduleTickExit` functions have been
added. These allow a user to schedule multiple exit events. The
functions contain a `exit_string` parameter that provides the string
the simulator is to return when the specified tick is met. By default
this string is "Tick exit reached" which is used by the stdlib
Simulator module to declare a new `SCHEDULED_TICK` exit event (Note:
this has been deliberatly kept seperate from the `MAX_TICK` exit event.
This commit serves as an attempt to decouple these are two concepts).

Tests are provided in this patch to ensure these new functions work as
intended.

Additional notes:
- The `simulate` function has been fixed to match the documentation. If
  the `num_cycles` is -1 then the maximum ticks is set to MaxTicks.
  Otherwise the max ticks is set to `curTicks() + num_cycles`. The
  functionality of this function will remain unchanged to the end-user.
- Full integration into the Simulator module is not complete as of this
  patch. Users must us the m5 python module to set these exit events.

Change-Id: I6c92b31dd409dc866152224600ea8166cfcba38b
Issue-on: https://gem5.atlassian.net/browse/GEM5-1131
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66231
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2022-12-02 06:04:53 +00:00
Hoa Nguyen
aeb617868f stdlib: Add MESI Three Level cache hierarchy
Change-Id: Ibea6b71d62b71f7817f6860bbceed9e1915bb002
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65591
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2022-11-30 01:19:37 +00:00
Hoa Nguyen
eac06ad681 python: Fix multiline quotes in a single line
An example case,
```python
mem_side_port = RequestPort(
    "This port sends requests and " "receives responses"
)
```

This is the residue of running the python formatter.
This is done by finding all tokens matching the regex `"\s"(?![.;"])`
and manually replacing them by empty strings.

Change-Id: Icf223bbe889e5fa5749a81ef77aa6e721f38b549
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66111
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-29 23:44:38 +00:00
Hoa Nguyen
f99947059d stdlib: Clean up Ruby cache directory
- Fix typos.
- Fix type inconsistencies.

Change-Id: I98d82ec7e62130abb09295c5ec6cde86b1f7fa27
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65571
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-29 23:36:26 +00:00
Hoa Nguyen
c8949f085f stdlib: Change #virtual_networks of mesi_two_level to 3
A grep of "virtual_network" in src/mem/ruby/protocol shows that
files in MESI_Two_Level.slicc utilizes at 3 virtual networks.

Change-Id: I3e8dd09dd82b9c802fdf91145c6d998bc6db541b
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65592
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-11-29 19:51:16 +00:00
Hoa Nguyen
8391f47bc9 stdlib: More helpful message for the filelock error
Change-Id: Ib8e3bc9fc145a9604670e8288209ac62bfbd7932
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66091
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-29 19:09:37 +00:00
Jasjeet Rangi
f172c41c68 stdlib: Fix get_isa_from_str() exception behavior in isas.py
When given an input string that does not match any valid ISA, the
get_isa_from_str() function should call get_isas_str_set() to to print
the valid ISA strings in the exception. The current behavior is to
recursively call get_isa_from_str() with no input, which prevents
the correct exception from being raised. This change causes the
correct exception to be raised for invalid inputs.

Change-Id: I92bfe862bbd99ce0b63bfc124e539fab3b175e0c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65411
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-09 18:37:14 +00:00
Jasjeet Rangi
78b978686c stdlib: Fix get_isa_from_str() exception behavior in isas.py
When given an input string that does not match any valid ISA, the
get_isa_from_str() function should call get_isas_str_set() to to print
the valid ISA strings in the exception. The current behavior is to
recursively call get_isa_from_str() with no input, which prevents
the correct exception from being raised. This change causes the
correct exception to be raised for invalid inputs.

Change-Id: I92bfe862bbd99ce0b63bfc124e539fab3b175e0c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65311
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-09 17:16:34 +00:00
Hoa Nguyen
553096ee53 stdlib: Make the Matched board a package
So that the board and its components can be reused.

Change-Id: Idae1a4493fbb4d826ac8da76532692a985f8025f
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65331
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-11-08 05:32:32 +00:00
Hoa Nguyen
26c27b1bf8 stdlib: Change the default kernel boot param from "ro" to "rw"
Running workloads likely causes some content to be written to
the disk image, e.g., `m5 readfile`. However, on riscv boards,
the default kernel param specifies the disk image to be read-only.

This change changes this param so that the disk image is
read-write by default.

Change-Id: I414e483ad11d747f34433560e32a8f91a425ce7e
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65194
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-04 19:29:38 +00:00
Bobby R. Bruce
c871d25ede stdlib: Fixing erroneous typing in Simulator __init__
The key in the `on_exit_event` dictionary can only be an ExitEvent. The
typing information here suggested a string could be passed. This is not
the case. This patch fixes the issue.

Change-Id: Iaa4b66417c15e31f6aafe9e550a7552461a15be1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64773
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-04 18:04:54 +00:00
Bobby R. Bruce
353c20e8bf stdlib: Fix typos and remove unneeded import in Simulator
Change-Id: I6faa63959d09444b8e931e14846fb1af98866ade
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62931
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-04 18:04:54 +00:00
Bobby R. Bruce
c88b528738 stdlib: Update AbstractCore's 'set_inst_stop_any_thread'
This patch:
- Makes this function private.
- Updates the function's documentation.
- Changes the 'init' parameter to 'board_initialized'.

It doesn't make much sense for this function to be exposed directly to
the user as it requires knowing whether the board is initialized or not.

In addition to this I believe it makes more sense for the 'init' logic
to be flipped and renamed "board_initialized' so that this value is True
if the board has been initialized.

The documentation for this function has been updated.

Change-Id: I016c65bde88357111d3e648d7aa99aeb6e31f410
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64833
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-04 18:04:54 +00:00
Bobby R. Bruce
12d8d5ca26 stdlib: Update AbstractCore set_simpoint func
This change:
- Makes this function private.
- Adds better documentation describing the usage.
- Changes the 'init' param to 'board_initialized'

This function really doesn't make much sense to set directly by an
stdlib user. It requires knowing whether or not the the board has been
initialized which is an annoying detail and will cause error if set
incorrectly.

The logic of the `init` parameter has been flipped to be
`board_initialized`. This makes it clearer what the parameter is
doing and what it's for.

The documentation for this function has been updated to make it clearer
on how the `board_initialized` parameter should be used correctly.

Change-Id: I567a48df06e6327b38673a2c510065d4334657e2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64832
Reviewed-by: Melissa Jost <mkjost@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-04 18:04:54 +00:00
Bobby R. Bruce
905b71c375 python: Move find from group to AbstractStat
This expands the 'find' feature to be recursive and find all the
stats/groups of stats of that regex all the way down the SimStats tree.

Change-Id: Id888911a6189e0440d2537f9720aa594353e00c7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63692
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-03 22:32:36 +00:00
Bobby R. Bruce
b65fa9e0d8 python: Add AbstractStat for PyStats
Previously all PyStats inheritted from JsonSerializable. The
AbstractStat class has been added to give a cleaner, clearer Base class
for PyStats.

Change-Id: I7e1808c4b4dcd6110fd524ad3553a9dc19f72e24
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63691
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-03 22:32:36 +00:00
Bobby R. Bruce
68f8c2946d stdlib: Add 'get_simstats' function to simulator
Change-Id: Iedf937a66f33c5a5feada4ffbf550540f65680d1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63272
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-11-03 22:32:36 +00:00
Bobby R. Bruce
4a06375212 stdlib: Add __repr__ to pystats
For Statistics the value is returned. E.g.:

```
print(simstats.board.core.some_integer)
> 5
```

For Groups the names of the stats in that group are listed.
E.g.:

```
print(stats.board.core)
> [Group: [some_integer, another_stat, another_group]]
```

Change-Id: I94cea907608fba622f4fc141d5b22ac95d8cde40
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63271
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-03 22:32:36 +00:00
Bobby R. Bruce
be33be87da misc: Update black to process src/python/m5/ext/pystats
The exclusion in .pre-commit-config.yaml covered all files in
src/python/m5/ext. This excludes src/python/m5/exit/pystats, which we
want covered by black. This commit updates .pre-commit-config.yaml to
only exclude src/python/m5/ext/pyfdt.

This change also runs black on these files.

Change-Id: Iecff45ea2a27a37fc0d00b867d41300aad911c7a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63711
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-03 22:32:36 +00:00
Bobby R. Bruce
5204b58e19 stdlib: Rename JsonSerializable to SerializableStat
As this abstract class now allows the output of text stats, it's more
appropriate to rename it. It no longer handles processing just for JSON
output

Change-Id: Ia9a1e3ef4029de45a11ac261fb14c9bdfa412cdd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/59273
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-03 22:32:36 +00:00
Melissa Jost
23d405ea55 tests, resources: CVE-2007-4559 Patch
Hi, we are security researchers from the Advanced Research Center at Trellix.
We have began a campaign to patch a widespread bug named CVE-2007-4559.
CVE-2007-4559 is a 15 year old bug in the Python tarfile package. By using
extract() or extractall() on a tarfile object without sanitizing input,
a maliciously crafted .tar file could perform a directory path traversal
attack. We found at least one unsantized extractall() in your codebase
and are providing a patch for you via pull request. The patch essentially
checks to see if all tarfile members will be extracted safely and throws
an exception otherwise. We encourage you to use this patch or your own
solution to secure against CVE-2007-4559.

If you have further questions you may contact us through this
projects lead researcher Kasimir Schulz.

Change-Id: I891ac6652cfbd479aed51d64ef6d4e0fe740e06d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65271
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-11-03 22:17:50 +00:00
Earl Ou
5bf88bf7a1 sim: allow specifying remote gdb port for each workload
In a platform with multiple systems, we may want to specify the
remote gdb port for each system. This change makes it
possible to specify the port number at each Workload instance.

Change-Id: I755b3960ee920ae5289819aa05d98902614a5615
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65151
Maintainer: Earl Ou <shunhsingou@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-03 05:34:09 +00:00
Jason Lowe-Power
c6918c8f74 python,stdlib: Add multiprocessing module
This changeset replicates some of the multiprocessing module
implementation from the python standard library in gem5. The goal of
this and following changesets is to enable users to use a *single* set
of python scripts to run and analyze a suite of gem5 simulations.

We must reimplement some of the multiprocessing module becaue it is not
flexible enough to allow for customized command line parameter to the
"python" executable (gem5 in our case). To get around this, I extended
the Process and context objects to be gem5 specific.

The next steps is to wrap the Process and Pool types with gem5-specific
versions that will improve their usability for our needs. With this
changeset, these objects are usable, but it will require significant
user effort to reach the goal of running/analyzing many different gem5
simulations.

There are some limitation:
- The pool will only work if the max tasks per child is 1
- The functions that are executed must come from another module

As an example, the following code should work after applying this
change.

test.py:
```python
from gem5.utils.multiprocessing import Process, Pool
from sim import info, run_sim
if __name__ == '__m5_main__' or __name__ == '__main__':
    info('main line')
    p1 = Process(target=run_sim, args=('bob',))
    p2 = Process(target=run_sim, args=('jane',))
    p1.start()
    p2.start()
    p2.join()
    p1.join()
    with Pool(processes=4, maxtasksperchild=1) as pool:
        pool.map(run_sim, range(10))
```

sim.py:
```
import os
def info(title):
    print(title)
    print('module name:', __name__)
    print('parent process:', os.getppid())
    print('process id:', os.getpid())
def run_sim(name):
    info('function g')
    from gem5.prebuilt.demo.x86_demo_board import X86DemoBoard
    from gem5.resources.resource import Resource
    from gem5.simulate.simulator import Simulator
    board = X86DemoBoard()
    board.set_kernel_disk_workload(
        kernel=Resource("x86-linux-kernel-5.4.49"),
        disk_image=Resource("x86-ubuntu-18.04-img"),
    )
    simulator = Simulator(board=board)
    simulator.run(max_ticks=10000000)
```

Change-Id: I4348ebaa75d006949ec96e732f5dc2a5173c6048
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63432
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
2022-11-02 20:05:49 +00:00
Bobby R. Bruce
26858db854 stdlib: Refactor the ArmBoard for _connect_things move
Since moving `_connect_things` to a pre-init step, the ArmBoard can now
be refactored to set up things in a more logical manner. In particular,
this patch moves activity out of the `_add_disk_to_board` function and
into the `_pre_initialization` function.

Change-Id: I5d40267f28ae87cd483a0396739c09b8b2b46383
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65052
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-01 18:57:36 +00:00
Bobby R. Bruce
25d4fb2d91 stdlib: Move _connect_things to run as pre_instantiation
Through working with the gem5 stdlib there have been instances where
connecting the memory, processor, and cache hierarchy to the board (via
the AbstractBoard's `_connect_things` function) at the point of the
AbstractBoard's construction is problematic as the memory, processor,
and cache hierarchy may require information to connect correctly that is
only known to the AbstractBoard after construction. In particular this
can occur when a Workload contains information needed to configure
correctly.

To resolve this problem the `_connect_things` function has been moved to
run as a pre-initialization step. That is, run immediately before
`m5.instantiate`. This is done in the Simulator module.

This will break cases where a user utilizes the stdlib AbstractBoard but
does not use the stdlib Simulator module. As such, an Exception is
raised in these cases explaining the fix to the user. This is done via a
hack where the boards' `createCCObject` function (inheritted
from SimObject) is overriden with a check to ensure `_connect_things`
has been run. To fix the `_pre_instantiate` function must be executed
prior to `m5.instantiate` in the Python configuration script. Test and
config scripts in the gem5 repo have been updated accordingly.

Change-Id: Ibaef36eb7433ce104b861b1da80fc600f08f715a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65051
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-01 18:57:36 +00:00
Kaustav Goswami
75c1df0d06 stdlib,arch-arm: Add ruby cache support to the ArmBoard
This change adds ruby cache support to the ArmBoard. Previously
only classic caches were supported by the ArmBoard. The ArmBoard
was tested with CHI, MESI_Two_Level and MI_example caches from
the gem5's stdlib.

Change-Id: I480fe6ae13e3bd8438a425548ed113d443fcee40
Signed-off-by: Kaustav Goswami <kggoswami@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64011
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-01 18:57:36 +00:00
Jason Lowe-Power
04ac9d9f4f stdlib: Give board interface for mem ports
It is possible that the board has more than just a "main" memory. For
instance, the ArmBoard has a boot memory which is separate from the
`get_memory` function.

This moves the `get_mem_ports` function to the board so that the board
can optionally override it.

Change-Id: I05e388cc93e691e9a4fa674023f158af447349f9
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64631
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-01 18:57:36 +00:00
Bobby R. Bruce
3ab6a7496b stdlib: Move setting of checkpoints to set_workload funcs
It never made much sense to set checkpoint via the Simulator module as
Checkpoints are very tightly coupled with the Workload being run. This
change therefore moves the checkpoint to the set_workload functions.

Setting checkpoints via the Simulator is deprecated and will be removed
in a future release.

Change-Id: I24d2133b38a86423d3553ec888c917c5fe47b93d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64571
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-10-28 00:16:44 +00:00
Melissa Jost
ceac4b8f1a stdlib,configs: Update simpoint example to use the Workload
With the inclusion of the "x86-print-this-15000-with-simpoints"
workloads (introduced here:
https://gem5-review.googlesource.com/c/public/gem5-resources/+/64531)
This patch utilizes this workload for the simpoint examples.

Change-Id: I5e2c4a48206fd7108a33a4a64ac64235ea9f1f33
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64552
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-28 00:16:44 +00:00
Bobby R. Bruce
36e5feb0de stdlib: add 'get_simpoint' function to se_binary_workload.py
This function is necessary to obtain the workload from a board once set.
This is a stop-gap solution to get SimPoints working with SE workloads
but will need revision when implementing this functionality for FS.

Change-Id: Ided2b1a5867655a98730879524e0be61c3f20295
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64551
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Melissa Jost <mkjost@ucdavis.edu>
2022-10-28 00:16:44 +00:00
Melissa Jost
f1be0c808a stdlib: Added set_se_simpoint_workload to SEBinaryWorkload
Change-Id: I815d4aff655e96619a44fc6fc04b674a794056a2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64432
Reviewed-by: Melissa Jost <mkjost@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-10-28 00:16:44 +00:00
Zhantong Qiu
84acdd4836 stdlib: add SimPoint checkpoint generator
The previous SimPoint warmup length was limited by the gaps between
the starting instruction of one SimPoint and the ending instruction of
the SimPoint before it. This was to prevent duplicate SimPoints, but it
can significantly limit the warmup length.
In this commit, the warmup length limitation will be extended to the
starting instruction of one SimPoint regardless of the gap between
SimPoints.
A SimPoint checkpoint generator is created to help taking checkpoints
for SimPoints and make sure multiple SimPoint checkpoints are taken
when there are multiple SimPoints sharing the same starting instruction

Change-Id: If95f6813e8cbf5c01e41135c1b1bb91ed2e950ad
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64351
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-10-22 00:23:19 +00:00
Jason Lowe-Power
1bb68ff893 stdlib,mem-ruby: Add DVM TBEs to CHI in stdlib
Change-Id: I12c7cf3aff5450c73c626c5272ae34d84dc612c3
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64691
Reviewed-by: Tiago Muck <tiago.muck@arm.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-20 02:34:26 +00:00
Jason Lowe-Power
b3372a7053 stdlib: Update TestBoard to work with Simulator
This change makes minor updates to the TestBoard so that it can work
nicely with the Simulator module.

This change also makes the cache hierarchy optional for the TestBoard.

Change-Id: If46d53779164e87b6fc06176355be6b4ae05aa99
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64017
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Mahyar Samani <msamani@ucdavis.edu>
2022-10-18 21:40:59 +00:00
Jason Lowe-Power
b8e6e3aa43 python: Update -c to work like normal python
In python, when you use -c it consumes all subsequent parameters and
appends them to argv. Now, gem5 and python behave the same with -c.

Python:
> python -c "import sys; print(sys.argv)" --hello -j
['-c', '--hello', '-j']

gem5:
> gem5.opt -c "import sys; print(sys.argv)" --hello -j
gem5 Simulator System.  https://www.gem5.org
gem5 is copyrighted software; use the --copyright option for details.

gem5 version [DEVELOP-FOR-22.1]
gem5 compiled Oct 17 2022 15:47:46
gem5 started Oct 17 2022 15:53:45
gem5 executing on challenger, pid 4021103
command line: build/ALL/gem5.opt -c 'import sys; print(sys.argv)' --hello -j

['-c', '--hello', '-j']

Change-Id: I53e87712be9523e0583149235c9787c92618f884
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63151
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2022-10-18 18:00:02 +00:00
Zhantong Qiu
9ac075ea36 stdlib: added errout and output file option in SE process
In the set_se_binary_workload(), added stdout_file and stderr_file
arguments to setup process.errout and process.output.

Change-Id: I54db2248578f485a633d6b6212fa6c62bcbca4de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64151
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-10-11 00:32:50 +00:00
Jason Lowe-Power
d2a6d2f7ee stdlib: Add _post_instantiate function
This function will be called on the board after m5.instantiate is
called. This is useful, for instance, to start traffic generators.
Currently all implementations simply `pass`.

Change-Id: Ie2ab3fdddca5f3978d98191e5c08504561587fbb
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64016
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-07 23:52:14 +00:00
Jason Lowe-Power
55f80ae0a1 stdlib: Allow cache_hierarchy to be optional
This changeset makes the cache_hierarchy optional on the board. This
will allow us to enable the TestBoard to have memory directly connected
to the traffic generator.

Change-Id: I62d310e74c43724ea38e3b71a4d91d9e06d6e855
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64015
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-10-07 23:51:18 +00:00
Jason Lowe-Power
007a99e9a0 stdlib: Update the default exit events and warning
This change updates the default actions taken when the user doesn't
specify generators for the exit events in the simulator. Rather than
defining default generators, this change makes the generators more
generic and gives a new decorator to mark them as default.

This change then updates the default generators in the simulator and
only makes some of them issue a default warning. For exit events such as
EXIT, the default will no longer print a warning.

Change-Id: I5552f52392f3aea577034ed278a9ff9e8b5b0b01
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64251
Reviewed-by: Zhantong Qiu <ztqiu@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-07 23:50:41 +00:00
Giacomo Travaglini
336e732d54 misc: Replace namespace Trace with lowercase trace
This is what the coding style demands

Change-Id: Ida6a71ad9c2c02cccd584bbaf37a6da751c5b856
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63891
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2022-10-02 16:30:15 +00:00
paikunal
4662e18981 stdlib: Edit RiscvMatched RTC
Fixed the bug that made FS mode break.
Changed RTC value as fix.

Change-Id: I0effa1ecd32a8a8845e619d940f8e0efe549cfc1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64013
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-01 03:44:06 +00:00
Tiago Mück
3871f57dc3 configs: set requestToMemory buffer size for CHI
Currently TBEs for write requests are deallocated when the request is
pushed to memory, so an unlimited requestToMemory buffers size allows
for an unlimited number of outstanding write requests.

Set the requestToMemory buffers size prevents this.
The buffer size should be greater than the enqueue latency to allow at
least one enqueue per cycle.

JIRA: https://gem5.atlassian.net/browse/GEM5-1195

Change-Id: I31829b6bbabd8b45e1142790038c27bd459fa709
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63674
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-09-28 18:56:04 +00:00