Commit Graph

1001 Commits

Author SHA1 Message Date
Gabe Black
46bf404397 sim: Convert the various flavors of pipe to GuestABI.
Change-Id: I44aaff417ea6a3ce311208b084fe4013bb93a48e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23457
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 07:21:13 +00:00
Gabe Black
3b98e65eaf sim,gpu: Make ioctl unconditionally take an address parameter.
The definition of ioctl is not actually variadic, it just doesn't
specify what the type of the pointer is that it takes as its third
argument. The man page says that that's because it predates void *
being valid C.

By passing this address around (even if it's unused), we avoid having
to extract system call arguments further down the call stack.

Change-Id: I62541237baafaec30bbe3df06b3284dd286a4051
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23456
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 07:21:13 +00:00
Gabe Black
b2625d0b03 sim: Clean up some constants used in some syscalls.
Having readable constants for these large numbers is good, but they
used incorrect style, were at global scope, and were only used in one
place.

This change centralizes them where they're used, fixes their style, and
rewrites the actual constants in a way that makes it clear what they're
values are.

Change-Id: Ib89c46fce133d4180296d384a61d51d1fe1f8d20
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23455
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 07:21:13 +00:00
Gabe Black
0c00e78516 sim: Convert ftruncate64 to GuestABI.
This function was specifying a particular width to getSyscallArg. The
new ISA specific ABIs now handle that automatically.

Change-Id: I141655d3bcb78f56c2a9278d140dfbc0d69e1ff4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23454
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
3e34278b3f sim: Remove the get*PseudoFunc handlers.
These were used in Alpha which has been removed.

Change-Id: I801ef71972b0c3d2aa04d682a3a94acfb27ac7ed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23449
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
be0d961bbf sim: Add GenericSyscallABI structs which can be used by the ISAs.
It's very common for system call arguments to be passed in a sequence
of registers, one argument per register. To avoid having that
implementation repeated over and over across the various ISAs and OSes,
these partial ABI implementations provide that mechanism they can just
pull in. They would need to define the sequence of registers to use,
and these would take care of the rest.

Unlike the temporary DefaultSyscallABI which defers to the Process
classes, these read registers from the ThreadContext directly.

Change-Id: Ic72eb8d784ecf4711b5eec76d958a87c70850fce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23441
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
9d606b80b6 sim: Make SyscallReturn handle extra/"pseudo" return registers.
Avoid special casing them in the system calls themselves.

Change-Id: I735f8e6fdff164c66e3f1386aed3fc9b107ea45f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23440
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
eb4a5c15ce sim: Remove ISA specific KVM handling of the return from clone.
When the new thread context ctc is created, it should have a copy of
all the state in the original tc, including the original PC. This code
used to specially handle the KVM case by explicitly making this new
context return from the system call immediately by jumping right to
RCX which (assuming a particular instruction was used) is where user
mode should resume.

The first problem with this approach as far as I can tell is that the
CPU will still be in CPL0, ie supervisor mode, and will not have been
forced back into CPL3, ie user mode. This may not have any immediately
visible effect, but may down the line.

Second, this seems unnecessary. The non-special case code will advance
the PC beyond the instruction which triggered the system call. Then
once the new thread starts executing again, it will execute sysret and
return to rcx naturally, just like the original thread will.

The only observed difference is that when executing a gem5 instruction,
the IP is set to the currently executing instruction, and so to avoid
the new context from re-executing the system call, the PC needs to be
advanced. When calling in from KVM, the instruction has already been
"completed", and so the IP should *not* be advanced.

Also note that when reading the PCState object in KVM, it doesn't
figure out where the next instruction is and so NPC is just one
ExtMachInst sized blob later on. Advancing the PC will just move to
an address 8 bytes later, which is very unlikely to be what you want.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I0d97f66e64ce39b13d6700dcf3d7da88d6fe0048
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23199
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 00:43:28 +00:00
Gabe Black
ca867678a6 arch,sim: Convert clone to GuestABI and define a cloneBackwardsFunc.
cloneBackwardsFunc takes its arguments in the order specified for
ARM and RISCV. Because of the new GuestABI mechanism, it can be a
simple wrapper around the normal clone implementation without the need
for #ifdefs.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Iff1ffd6774b9162185a124585e9507a5bdbc46f4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23198
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 00:43:28 +00:00
Gabe Black
382dda67dc sim: Use variadic GuestABI arguments in a few additional syscalls.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ib2f193e7409859469c853e11f121eba82b3c0ddc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23196
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 00:43:28 +00:00
Gabe Black
73fdc2eb57 config,arch,cpu,kern,sim: Extract kernel information from System.
Information about what kernel to load and how to load it was built
into the System object and its subclasses. That overloaded the System
object and made it responsible for too many things, and also was
somewhat awkward when working with SE mode which doesn't have a kernel.

This change extracts the kernel and information related to it from the
System object and puts into into a OsKernel or Workload object.
Currently the idea of a "Workload" to run and a kernel are a bit
muddled, an unfortunate carry-over from the original code. It's also an
implication of trying not to make too sweeping of a change, and to
minimize the number of times configs need to change, ie avoiding
creating a "kernel" parameter which would shortly thereafter be
renamed to "workload".

In future changes, the ideas of a kernel and a workload will be
disentangled, and workloads will be expanded to include emulated
operating systems which shephard and contain Process-es for syscall
emulation.

This change was originally split into pieces to make reviewing it
easier. Those reviews are here:

https: //gem5-review.googlesource.com/c/public/gem5/+/22243
https: //gem5-review.googlesource.com/c/public/gem5/+/24144
https: //gem5-review.googlesource.com/c/public/gem5/+/24145
https: //gem5-review.googlesource.com/c/public/gem5/+/24146
https: //gem5-review.googlesource.com/c/public/gem5/+/24147
https: //gem5-review.googlesource.com/c/public/gem5/+/24286

Change-Id: Ia3d863db276a023b6a2c7ee7a656d8142ff75589
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26466
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-11 15:57:14 +00:00
Gabe Black
10833b50fe base,cpu,sim: Stop including arch/vtophys.hh when not using vtophys.
These #includes are leftovers from when vtophys was used much more
prevalently in the simulator.

Change-Id: Ib2e947bc95f1e21acc9eff8e856f38b31d3fd933
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26225
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-09 21:31:50 +00:00
Gabe Black
4f4fe6f80e sim,arch: Move code that waits for a GDB connection to startup().
Currently the System class has a mechanism to wait for a GDB connection
for each CPU which has requested it through one of its parameters.
Unfortunately, not every thread context/CPU will be ready for GDB at
that point, particularly considering that in an FS simulation the
kernel won't have been read so there will be no symbols, none of the
registers or the entry point will have been set.

Also in the fast models, the CPUs haven't had a chance to initialize
themselves enough by that point to respond to the API calls which are
used to implement GDB support.

Change-Id: If27cb3e0259a1f67599ab0493695b2f8af640d8e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24963
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-27 13:02:44 +00:00
Ciro Santilli
0aafbd422a sim: print --debug-flag Event execution and instance ID
This makes it much easier to determine what event is causing something to
happen, especially when there are multiple events happening at the
same time.

Change-Id: I17378e16bd3de1d98e936a6252aab2cd8c303b23
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25383
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-26 10:58:37 +00:00
Bobby R. Bruce
990b7a7f11 misc: Merged release-staging-v19.0.0.0 into develop 2020-02-24 12:22:38 -08:00
Jason Lowe-Power
a812d86292 sim: Fix pseudo instruction parameter loading
With the new ABI API the position argument of the pseudo inst ABI was
not updated correctly. The position needs to be incremented (at least)
once per argument.

Note: `position++` must be outside of the function call because of a GCC
complaint:
build/X86/sim/pseudo_inst.hh:80:48: error: cannot bind non-const lvalue
reference of type 'int&' to an rvalue of type 'PseudoInstABI::Position
{aka int}'
         return TheISA::getArgument(tc, position++, sizeof(uint64_t),
false);

Issue: https://gem5.atlassian.net/browse/GEM5-351
Change-Id: Idd890a587a565b8ad819f094147a02dc1519e997
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25543
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-20 02:15:09 +00:00
Gabe Black
eb40af3bd4 sim: Delete authors lists from files in sim.
Change-Id: I09a6117772c092157bf83701cf853145bb88ccf8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25411
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-18 03:34:31 +00:00
Gabe Black
208dcd315e sim: Remove mention of alpha.
Change-Id: Iec6b9284383d380885955438c3693b0d2efc497e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24649
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-13 23:25:09 +00:00
Gabe Black
97a0ad7f63 arch,sim: Replace setuidFunc with ignoreFunc.
The setuidFunc just ignores the call and warns about it, and that's
what ignoreFunc already does.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I7655863ed6fe200ff3ac087be3218d49c3c43061
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23194
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 13:05:45 +00:00
Gabe Black
97c02b000e sim: Convert most of the common syscalls to use the guest ABI.
A couple tricky instances were left alone for now, specifically one
place where the size of the argument is specified explicitly (the
default ABI always leaves off the size), and two places where the
arguments are variadic which is not yet supported.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I2ec19bea77d329de3575e17e9f7209f4fd871aa6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23193
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:59:10 +00:00
Gabe Black
c7cb8bb5d8 sim: Use the Guest ABI mechanism in writeFunc.
This change only modifies the writeFunc since it's easy to test using
the hello world test programs.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ia4a7bacdb9938d9fbe4093fc6958904d6c423360
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23192
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:58:35 +00:00
Gabe Black
a255a2ee64 sim: Add a transitional syscall ABI which defers to Process.
This change adds a transitional ABI which just falls back to the
existing Process syscall arg getters. It should be phased out once each
ISA implements its own actual ABI.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ic40bd924989f91de70bbce59fda888b79bbbfca4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23190
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:57:22 +00:00
Gabe Black
549e0b25e3 sim: Add a function for decoding the field(s) of an m5op address.
These have at one time included both a func and subfunc, although the
subfunc was unused and is now excluded.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ic35ced7a012aa72af5454768f3cbd11b431b061a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23183
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Marjan Fariborz <mfariborz@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-02-07 07:41:07 +00:00
Gabe Black
95c6a839a5 arch,sim: Use _m5opRange in System::allocPhysPages.
This removes the hardcoded assumption that the m5 ops live at the
address they use in x86.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ia551d7cf5b08f926c7756541c92a2af9bb73b88a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23181
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-07 07:37:38 +00:00
Gabe Black
206aa5b280 sim: Add a typetraits style mechanism to test for VarArgs.
This family of types can be cumbersome to check for when building
ABI rules. This struct template makes that a little easier.

Change-Id: Ic3a1b8424f8ca04564f8228365371b357f33276c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23750
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-02-07 07:36:39 +00:00
Gabe Black
24be0cc1ce sim: Make it possible for a GuestABI to init its Position based on a TC.
It may be necessary to initialize the GuestABI Position type based on
the current state of the thread, for instance by reading the current
stack pointer.

This change makes it possible (but not mandantory) for an ABI to supply
a constructor for Position which accepts a ThreadContext * which it can
use to intiialize itself.

Change-Id: I5609b185f746368c5f9eb2a04074dcafa088f925
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23749
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-06 04:47:03 +00:00
Gabe Black
4ae8d1c0ed arch,sim: Merge initCPU into the ISA System classes.
Those classes are already ISA specific, so we can just move initCPU's
contents there and take it out of utility.hh, utility.cc, and the base
System's initState.

Change-Id: I28f0d0b50d83efe5116b0b24d20f8182a02823e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24905
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-01 12:31:56 +00:00
Gabe Black
6a7a5b3005 arch,sim: Merge initCPU and startupCPU.
These two functions were called in exactly one place one right after
the other, and served similar purposes.

This change merges them together, and cleans them up slightly. It also
removes checks for FullSystem, since those functions are only called
in full system to begin with.

Change-Id: I214f7d2d3f88960dccb5895c1241f61cd78716a8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24904
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-01 12:31:40 +00:00
Gabe Black
dc328d00eb sim,cpu: Move the call to initCPU into System.
The call to initCPU was moved into initState in the base CPU class
since it should only really be called when starting a simulation
fresh. Otherwise checkpointed state will be loaded over the state of
the CPU anyway, so there's no reason to set up anything else.

Unfortunately that made it possible for the System level initialization
and the CPU initialization to happen out of order, effectively letting
initCPU clobber the state the System might have set up to prepare for
executing a kernel for instance.

To work around that issue, the call was moved to init which would
necessarily happen before initState, restoring the original ordering.

This change moves the change *back* into initState, but of the System
class instead of the CPU class. This makes it possible to guarantee
that OS initialization happens after initCPU since that's also done
by System subclasses, and they control when they call initCPU of the
base class.

This also slightly simmplifies when initCPU is called since we
shouldn't need to check whether a context is switched out or not. If
it's registered with the System object, then it should be in a
currently swapped in CPU.

This also puts the initCPU and startupCPU calls right next to each
other. A future change will take advantage of that and merge the
calls together.

Also, because there are already ISA specific subclasses of System
which already have specialized versions of initState, we should be
able to move the code in initCPU and startupCPU directly into those
subclasses. That will give those subclasses more flexibilty if, for
instance, they want all CPUs to start running in the BIOS like they
would on a real system, or if they want only the BSP to be active
as if the BIOS had already paused the APs before passing control to
a bootloader or OS.

This will also remove another two TheISA:: style functions, reducing
the number of global dependencies on a single ISA.

Change-Id: Ic56924660a5b575a07844a198f69a0e7fa212b52
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24903
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-01 12:31:14 +00:00
Gabe Black
13083a1c9c sim: Add a GuestABI mechanism to allocate space for a return value.
Some ABIs (including 32 bit ARM, 64 bit x86) allocate their argument
registers differently depending on their return value. For instance,
if the value needs to be returned in memory because it's too big,
the caller could pass a pointer to where the result should be stored
when the function returns. This pointer acts like an invisible first
argument, offsetting where all the normal arguments actually live.

This change adds a mechanism to handle that case. The Result templates
can now declare an allocate() static method which is given a
ThreadContext *, and a reference to the Position object. It can perform
any adjustment it needs to before the normal argument extraction
starts.

Change-Id: Ibda9095f0e8c9882742d24f5effe309ccb514188
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23747
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-01-25 07:47:17 +00:00
Gabe Black
46fbd76595 sim: Move findFreeContext to System.
This method searches through the ThreadContexts stored in the system,
and has no concrete connection to Process other than it happened to be
used by a Process in the clone system call.

By moving it, we can use its functionality in classes other than
Process.

Change-Id: Ic6899c335dc13841c6fe948ea3a4f8ad67e562bb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24285
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-23 23:38:25 +00:00
Gabe Black
e3c3d2a1a8 sim: Eliminate the breakAtKernelFunction function.
It looks like this function is supposed to allow you to set up a PC
based event which will trigger when the simulator executes a particular
kernel function. That event doesn't actually do anything, but you can
set a breakpoint there with gdb when debugging gem5 itself.

There are a couple of problems with this function. First, it assumes
that you want to set the breakpoint based on the first system in your
simulation. Frequently simulations have only one system, but there
isn't any rule that says they must, or any way to pick a different
system.

Second, this function assumes that you're in FS mode, that there is a
kernel, and that there is a kernel symbol table to look symbols up in.

On top of that, this function is a bit redundant since you can just use
gdb to debug the kernel inside a simulated system.

Change-Id: I8dadbd42fc7d4ccba2a035a2a72e6ede4b872f3c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24644
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-23 23:36:35 +00:00
Gabe Black
b8883f887e sim: Add a dumpSimcall mechanism to GuestABI.
This dumps a signature for a simcall as if it was going to be invoked,
and can be used for debugging.

Change-Id: I6262b94ad4186bac8dc5a1469e9bb3b8ae9d34e1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23460
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-13 22:44:49 +00:00
Gabe Black
aabe7e1f69 sim: Add a unit test for the GuestABI mechanism.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I76934d94b4c61570a4ca603388012c65280e2b7c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23197
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-13 22:44:49 +00:00
Gabe Black
6c9da52bea sim: Implement a varargs like mechanism for GuestABI system.
This will let a function called with a GuestABI emulate the ...
mechanism available in C. To make that possible without the functions
knowing anything about the ABI and to follow C++'s (sensible)
templating and virtual function rules, you have to tell VarArgs what
types you might want to extract from it, unlike the pure ... varargs
style mechanism.

Also unlike ..., there is no mechanism in place to force the varargs
to appear last in the argument list. It will pick up the progress
through the arguments at the point it's reached, and will ignore any
later arguments. It would be possible to be more rigorous about this
by changing the callFrom templates, but the overhead in complexity
is probably not worth it.

Also, retrieving arguments through a VarArgs happens live, meaning at
the point that the argument is asked for. If the ThreadContext or
memory the argument lives in is modified before that point, the
retrieved value will reflect that modification and not what the
function was originally called with. Care should be taken so that this
doesn't cause corrupted arguments.

Finally, this mechansim (and the Guest ABI mechanism in general) is
complex and should have tests written for it. That should be possible
since ThreadContext is forward declared and so the test can say it
works however it wants or even ignore it completely. If that changes
in the future, we may need a mock ThreadContext implementation.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I37484b50a3e8c0d259d9590e32fecbb5f76670c1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23195
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-13 22:44:49 +00:00
Gabe Black
f7903a2014 arch,sim: Promote the m5ops_base param to the System base class.
This mechanism is shared between ARM and x86, even if x86 has a typical
address range it choses to use. By moving this to the base class, it's
now possible for anybody to find out where the m5 ops are, and no ISA
specific assumptions need to be made.

Because the x86 address is well known, it's set in the x86 System
subclass as the default.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ifdb9f5cd1ce38b3c4dafa7566c50f245f14cf790
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23180
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-07 23:31:51 +00:00
Gabe Black
0b52c24da6 arch,sim: Stop decoding the pseudo inst subfunc value.
This isn't used by anything any more. The func field is left in place
to ensure compatability, but there's no reason to decode a value
nobody is going to use.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I85fcd0e4a362551c29af6bff350d99af86050415
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23179
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-01-07 03:14:23 +00:00
Gabe Black
46117ecdc9 arch,sim: Use the guest ABI mechanism with pseudo instructions.
Right now, there are only two places which call the pseudoInst function
directly, the ARM KVM CPU and the generic mmapped IPR. These two
callers currently use the generic "PseudoInstABI" which is just a
wrapper around the existing getArgument function.

In the future, this getArgument function will be disolved, and the
PseudoInstABI will be defined for each ABI. Since it currently mimics
the Linux ABI since gem5 can only handle one ABI at a time right now,
this implementation will probably be shared by linux system calls,
except that the pseudo inst implementation will eat return values since
those are returned through other means when the pseudo inst is based on
magic address ranges.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ied97e4a968795158873e492289a1058c8e4e411b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23178
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-06 23:45:53 +00:00
Yu-hsin Wang
9f405040cd sim: Move destructor of Port to public
To preventing from instantiating an abstract class, hiding its
constructor is enough. Moving destructor to public doesn't break this
intention. This also makes us can use smart pointer to manage derived
Port class.

Change-Id: Ic9cf97e90a6c26108d359eb459df48cd23eaf15c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23925
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-03 12:35:38 +00:00
Adrian Herrera
e4c7ea67b8 sim: kernelExtras optional load addresses
This patch provides a new "System" parameter named "kernel_extras_addrs".
This allows to optionally specify fixed load addresses for the
additional kernel objects. This is useful to load arbitrary blobs into
memory.

Change-Id: I4725763b86c29f72282d1c184d4284d90f9d3016
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23566
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-18 09:15:32 +00:00
Gabe Black
d040db5361 sim: Include some required headers in the syscall debug macros header.
Everything that includes syscall_debug_macros.hh and uses the macro in
it will need these headers, so they should be included through
syscall_debug_macros.hh. The consumer shouldn't have to know what the
macros use internally and to include extra headers to support them.

Change-Id: I9bfa932368daec0772d552357ecad8790b4cfead
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23459
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-12-17 23:31:45 +00:00
Adrian Herrera
0e8ce8b12e sim: kernelExtras if no kernel provided
kernelExtras facilitates a way for users to provide additional
blobs to load into memory. As of now, the creation of the extra
images is done independently of the kernel being provided, but
the loading is only done if the kernel is present.

This patch refactors the loading of extra images to be committed
if no kernel is present.

Change-Id: I900542e1034ade8d757d01823cfd4a30f0b36734
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22850
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-12-16 10:33:56 +00:00
Gabe Black
390a74f599 sim,arch: Collapse the ISA specific versions of m5Syscall.
The x86 version doesn't do anything x86 specific, and so can be used
generically in sim/pseudo_inst.(hh|cc)

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I46c2a7d326bd7a95daa8611888051c180e92e446
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23177
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10 23:58:14 +00:00
Gabe Black
cb3457ccd1 arch,cpu,sim: Push syscall number determination up to processes.
The logic that determines which syscall to call was built into the
implementation of faults/exceptions or even into the instruction
decoder, but that logic can depend on what OS is being used, and
sometimes even what version, for example 32bit vs. 64bit.

This change pushes that logic up into the Process objects since those
already handle a lot of the aspects of emulating the guest OS. Instead,
the ISA or fault implementations just notify the rest of the system
that a nebulous syscall has happened, and that gets propogated upward
until the process does something with it. That's very analogous to how
a system call would work on a real machine.

When a system call happens, the low level component which detects that
should call tc->syscall(&fault), where tc is the relevant thread (or
execution) context, and fault is a Fault which can ultimately be set
by the system call implementation.

The TC implementor (probably a CPU) will then have a chance to do
whatever it needs to to handle a system call. Currently only O3 does
anything special here. That implementor will end up calling the
Process's syscall() method.

Once in Process::syscall, the process object will use it's contextual
knowledge to determine what system call is being requested. It then
calls Process::doSyscall with the right syscall number, where doSyscall
centralizes the common mechanism for actually retrieving and calling
into the system call implementation.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I937ec1ef0576142c2a182ff33ca508d77ad0e7a1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23176
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-12-10 23:58:14 +00:00
Gabe Black
4670de8100 arch: Get rid of the now unused setSyscallArg.
Setting syscall args isn't really something we need to do in gem5,
since that will be taken care of by the code actually calling the
syscall. We just need to be able to retrieve the value it put there.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I0bb6d5d0207a7892414a722b3788cb70ee509582
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23174
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10 23:58:14 +00:00
Gabe Black
8bb10463f4 sim: Add a wrapper/subclass for SyscallDesc which uses GuestABI.
This will let system call implementations take arguments naturally,
and centrally defined, potentially complex, and ISA/context specific
mechanisms will automatically gather the arguments and store any
result.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I68d265e0bab5de372ba975e4c7e9bb2d968c80af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23172
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10 23:58:14 +00:00
Gabe Black
78016fdd98 sim: Add a mechanism to translate ABIs to call host funcs from a TC.
The guest ABI is specified as a template parameter. This makes it
possible for host simcall handlers to be called through different ABIs
which might be from different ISAs, or might be from different contexts
within the same ISA (32 vs 64 bit, syscall vs. function vs.
pseudo instrunction vs. semihosting call).

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I66a0f558e9c1f70a142b69b0dd95bd71e41d898b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23171
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10 23:58:14 +00:00
Gabe Black
3989d7830a sim: Get rid of the now unused SyscallDesc flags and methods.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Icee18a4bd77a346d7f82ef4988651b753392d51e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23170
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10 23:58:14 +00:00
Gabe Black
771af751a2 sim: Reintroduce the ignoreWarnOnceFunc syscall handler.
Instead of just using warn_once, we'll gate each warning on a bool
which is associated with the syscall desc pointer. To avoid having to
keep warn once bookkeeping in every syscall desc, we put it in a map
which is looked up at runtime.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I1dcce48de91b8a635f9f3df3bfc0ed6ba1291c4f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23168
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-12-10 23:58:14 +00:00
Gabe Black
a33d20ccaf sim: Make the syscalls use the SyscallReturn suppression mechanism.
This, among other things, prevents them from needing to toggle global
flags in the syscall desc table to control local behavior.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Idcef23766084f10d5205721b54a6768a850f7eb9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23167
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-12-10 23:58:14 +00:00