Commit Graph

21792 Commits

Author SHA1 Message Date
Bobby R. Bruce
3142464ff7 misc: Add 'scheduler.yaml' workflow (#1307)
This is made to run on the 'stable' branch to schedule workflow runs on
the `develop` branch. This solves the problem of GitHub Workflows being
scheduled to only run on 'stable' branch' thus ignoring changes made to
them on 'develop'

With this schedule we no longer need to force a checkout of 'develop' in
the workflows. As such these have been removed.

The scheduled workflows are now triggered via "workflow_dispatch" via
the "scheduler.yaml" workflow
2024-07-01 12:36:56 -07:00
Bobby R. Bruce
e5414a80a3 misc, tests: Fix missing 's' in GPU tests (#1305)
This caused the weekly tests to fail. It's 'tests' not 'test'.
2024-07-01 07:37:32 -07:00
Matt Sinclair
04a3fd5b5d gpu-compute,mem-ruby: Add RubyHitMiss flag for TCP and TCC cache (#1260)
Add hit and miss print for TCP and TCC cache with RubyHitMiss debug flag

Change-Id: I40ae3449020b917f39ac91d29fa4e1dd7c791e7b
2024-06-30 13:32:01 -05:00
Bobby R. Bruce
ca4897897c misc: Merge stable into develop (v24.0 release) (#1295)
This guarantees all changes put on the staging branch and, for whatever
reason, put on stable are on develop.

In addition this PR reverts specific release procedures (e.g., reverting
the removal removing the -Werror compilation flag, and changing the
versioning back to "DEVELOP").
2024-06-27 23:45:25 -07:00
Bobby R. Bruce
beff732ecf util-docker: Set dev container to ":latest"
Change-Id: I73bb569e05830d35f0aa63eb75026a83377ae3a5
2024-06-27 23:42:25 -07:00
Bobby R. Bruce
4a28b367d7 scons: Readd -Werror for the develop branch
This reverts commit 6e4c1c5db7.
2024-06-27 23:38:36 -07:00
Bobby R. Bruce
b3f23830c9 misc: Update versioning for develop branch
Develop for v24.1

Change-Id: I4ef34c4a4ef67d171505ff9380746ae193655305
2024-06-27 23:36:07 -07:00
Bobby R. Bruce
6fcc13cf55 misc: Merge branch stable into develop
This guarantees all changes put on the staging branch and, for whatever
reason, put on stable are on develop. This syncs the branches.

Change-Id: Ib3513f49977bb4ed3046c2d9d6cf162953b15887
2024-06-27 23:27:21 -07:00
Bobby R. Bruce
43769abaf0 misc: Merge v24.0 release staging branch to stable (#1274)
This merge officially marks the release of gem5 v24.0.
2024-06-27 23:22:40 -07:00
Harshil Patel
3acb6e59cf resources: Update elfie.py to work with obtain_resources (#1289)
Change-Id: I08c5e50a150c8434c6c2ca36af81fb6ec3915af8
2024-06-27 20:02:57 -07:00
Jarvis Jia
f56571fed9 Merge branch 'develop' into rubyhitmiss 2024-06-27 21:45:08 +08:00
Bobby R. Bruce
b471d5f382 stdlib,tests: Update resources to v24.0 in Pyunit test (#1290)
This needs a better fix. I don't like having to update these files for
every release. Though for now, this will mean the tests passing in v24.0
2024-06-27 05:48:48 -07:00
Jason Lowe-Power
c1825a9c0a misc: Update release notes
Change-Id: Ia8bd55ab46dca7f0eef533c0c3b7da1fe4c84cc9
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2024-06-26 15:09:27 -07:00
Bobby R. Bruce
e4218a8c43 Merge branch 'stable' into release-staging-v24.0.0.0 2024-06-26 13:45:57 -07:00
Bobby R. Bruce
9d05b35884 misc: Improve gem5 Release notes for v24.0
Change-Id: I5d59f41a84919a9eba1cc00b116e2477ad0beb6e
2024-06-26 13:44:35 -07:00
Rajesh Shashi Kumar
3ce5e0584a arch-arm: This commit fixes a typo in the ARM ldaddalx instruction (#1279)
The acquire-release flavor of the ldadd instruction should read ldaddalx
(eg. ldaddalb/ldaddalh) according to specification. However, this is
currently noted as ldadd"la"x (eg. ldaddlab/ldaddlah).

Issue: https://github.com/gem5/gem5/issues/1224
Change-Id: Ib932fa0e572207729c923c27f24c34cc21dff0e5

Co-authored-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2024-06-26 09:03:50 -07:00
Harshil Patel
e0d03fbc2f resources: fix check for additional_params for workloads
Change-Id: I0a4b5f0eef6e2f9faf35cea8130572a066aab6cd
2024-06-26 07:13:04 -07:00
Jason Lowe-Power
f68f4dd390 resources: fix check for additional_params for workloads (#1287)
Change-Id: I0a4b5f0eef6e2f9faf35cea8130572a066aab6cd
2024-06-26 09:08:45 -05:00
Harshil Patel
144a2071fe resources: fix check for additional_params for workloads
Change-Id: I0a4b5f0eef6e2f9faf35cea8130572a066aab6cd
2024-06-25 16:30:07 -07:00
Matthew Poremba
faa18576f2 misc: Add high level GPU model release notes
Change-Id: I73dfba5eeeffe1b812bc41a80b9d0901822e8062
2024-06-25 11:21:20 -07:00
Harshil Patel
241b8a09df resources: Update client_query to trim gem5 version (#1284)
- gem5 was querying the full version of gem5 that is `24.0.0.0` while
searching for resources.
This was causing an error to find resources on staging branch. 
This change trims the gem5 version to be just the major.minor version.

Change-Id: I30c3a1b38c631981f797ef0fd2b616e6a66ca18e
2024-06-25 09:04:13 -07:00
Harshil Patel
52fde944a5 resources: Update client_query to trim gem5 version (#1284)
- gem5 was querying the full version of gem5 that is `24.0.0.0` while
searching for resources.
This was causing an error to find resources on staging branch. 
This change trims the gem5 version to be just the major.minor version.

Change-Id: I30c3a1b38c631981f797ef0fd2b616e6a66ca18e
2024-06-25 09:01:36 -07:00
Jarvis Jia
341c72839b Fix hit issue
Change-Id: I28745489de693591d5ad8453b035a8c782adaf1f
2024-06-24 11:19:51 -07:00
Jarvis Jia
21b69975a6 Fix compilation error
Change-Id: I8273472b8d0cff8c02f2d1e1a9d66599af7c4866
2024-06-24 11:19:51 -07:00
Jarvis Jia
e957a882ed gpu-compute,mem-ruby: Add RubyHitMiss flag for TCP and TCC cache
Add hit and miss print for TCP and TCC cache with RubyHitMiss debug flag

Change-Id: I40ae3449020b917f39ac91d29fa4e1dd7c791e7b
2024-06-24 11:19:51 -07:00
Bobby R. Bruce
84c3b0c111 misc: Update dummy jobs for workflows
These give us clear indications if a workflow has passed or failed.

Change-Id: If61b9ac5dc4d2da54b4ad68e427b149bbcb4a30b
2024-06-22 12:59:42 -07:00
Bobby R. Bruce
09781fd78f misc: Update dummy jobs for workflows
These give us clear indications if a workflow has passed or failed.

Change-Id: If61b9ac5dc4d2da54b4ad68e427b149bbcb4a30b
2024-06-22 12:58:35 -07:00
Bobby R. Bruce
79a0a2a15f Merge branch 'stable' into release-staging-v24.0.0.0 2024-06-22 12:31:45 -07:00
Giacomo Travaglini
7f3afc211c misc: Add MPAM entry in the v24 release notes
Change-Id: If11d470003e21e51dd5a3b1831d50ed8a54e1919
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2024-06-21 11:05:22 +01:00
Mahyar Samani
21bd1c28ab Adding an example for Spatter (#1272)
This change adds a new utility function for processing Spatter traces
into SpatterKernels under parse_kernels.
Additionally, it adds documentation for all the utility functions in
spatter_kernel.py.
Lastly, it adds an example script for running one spatter trace using
SpatterGenerator to the examples.
2024-06-21 02:26:58 -07:00
Mahyar Samani
30bfdc8e52 stdlib: Getter method to get monolith range. (#1273)
This change extend the AbstractMemory class to add a getter method that
allows other components to get the memory's range without interleaving.
This method will be useful if other components in the system need to
interleave the memory range different to the way the memory has
interleaved them.
2024-06-21 02:26:50 -07:00
Mahyar Samani
18bc5227f6 stdlib: Getter method to get monolith range. (#1273)
This change extend the AbstractMemory class to add a getter method that
allows other components to get the memory's range without interleaving.
This method will be useful if other components in the system need to
interleave the memory range different to the way the memory has
interleaved them.
2024-06-21 02:23:58 -07:00
Mahyar Samani
590bb1fbbb Adding an example for Spatter (#1272)
This change adds a new utility function for processing Spatter traces
into SpatterKernels under parse_kernels.
Additionally, it adds documentation for all the utility functions in
spatter_kernel.py.
Lastly, it adds an example script for running one spatter trace using
SpatterGenerator to the examples.
2024-06-21 02:23:41 -07:00
Bobby R. Bruce
6f95d4f3c3 misc: Add content for v24.0 RELEASE_NOTES.md
First draft. Not yet complete.

Change-Id: I80fa4fa4e82e0367cb347df53e9cc9cb52670bfc
2024-06-20 15:37:13 -07:00
Bobby R. Bruce
6e4c1c5db7 scons: Remove -Werror for the gem5 v24.0 release
Removing -Werror flag on the stable branch ensures that as new compilers
are releases (likely withs stricter warnings) gem5 remains compilable.

Change-Id: I0267c895414b630c1d7cd9b28236249790b3006f
2024-06-20 14:47:09 -07:00
Bobby R. Bruce
ec120e0c58 util-docker: Update devontainer Dockerfile for v24.0
Change-Id: Id21fb1b12d8ad58338233d4f32be5b57e025f18b
2024-06-20 14:31:12 -07:00
Bobby R. Bruce
d9d7d7646a misc: Update Doxygen version to v24.0.0.0
Change-Id: Ibaa04b09813a1d497727ed9d2a903ee2b3049ffd
2024-06-20 13:53:20 -07:00
Bobby R. Bruce
888bf0d693 base: Update src/base/version.cc for v24.0
Change-Id: Iac980772a42853f9bfbdadb65d5efc3c5fdb6aed
2024-06-20 13:53:07 -07:00
Jason Lowe-Power
013f773d31 arch-riscv: Fix TLB lookup with vaddrs (#1264)
Previously, all of the TLB lookup/insert functions were using the full
virtual addresses even though the variables in the functions said "vpn."
This change explicitly converts the virtual address to the VPN without
any least significant zeros for the offset. I.e., vpn >> page_size.

The main bug solved in this changeset is the asid was |'d with the upper
bits of the virtual address, but sometimes there were all 1's.
Therefore, you could get a TLB hit even if the ASID was different.
Interestingly, the page that seemed to cause these issues was a 1 GiB
page.

This change also starts refactoring some of the page table details to
support sv46 and sv57 page table formats.

In my testing, the Linux kernel boot uses large pages (even OpenSBI uses
large pages), so it seems that large pages also work. However, this
seems like magic to me, so I'm not sure if it's correct.

This change also updates some asserts, and debug statements with more
useful debugging information.

Partially fixes #1235. More testing needs to be done to be confident.
2024-06-20 13:24:50 -07:00
Bobby R. Bruce
7137b73ca0 cpu: Fix std::min type mismatch in reg_class.hh (#1266)
Introduced in #1234, this caused compilation to faill in Apple Silicon
systems. This bug is the same as #582 where a more detailed explanation
is provided.
2024-06-20 13:02:08 -07:00
Mahyar Samani
7ff1e381c9 cpu,stdlib: Fix Access Trace for Accessing Indices in SpatterGen (#1258)
This change fixes the way indices are generated in a multi generator
setup.
It changes it from all cores generating the same trace of indices for
accessing the index array to each core generating an interleaved subset
of indices.
For an example look below for traces (indices to index array) in a 2
core setup.

Before:
core_0: 0, 1, 2, 3, 4, 5, 6, 7, ...
core_1: 0, 1, 2, 3, 4, 5, 6, 7, ...
After:
core_0: 0, 1, 2, 3, 8, 9, 10, 11, ...
core_1: 4, 5, 6, 7, 12, 13, 14, 15, ...

Additionally, this change fixes the SpatterKernel class in the standard
library to comply with the change in the SpatterGen source code.
2024-06-20 11:24:44 -07:00
Matthew Poremba
ed860dfe54 configs: Check before use replacement policy options (#1261)
Rather than adding the options to *every* config that might be using
GPU_VIPER.py, just change the Ruby config to check if the option is
available before trying to use it. Otherwise, reverts to what was the
default on stable.

Change-Id: Ia6f1d0827d489ee2a35c598b644461cbff59e247
2024-06-20 09:50:29 -07:00
TiredTumblrina
9fb0b18863 gpu-compute,mem,systemc: This commit corrects typos of 'cache' (#1263)
I noticed while using the stable branch that there were a few typos of
the word 'cache' and so I've corrected a few files where I found such
typos.

Change-Id: I7c7f64812039f34fe39d0c45c4f5ce921cba06d0
2024-06-20 09:45:13 -07:00
Jason Lowe-Power
943daeb603 stdlib: Add function to append kernel args (#1262)
Often, you want to add another argument to the default kernel arguments.
This function allows you to do that on the `kernel_disk_workload` board
mixin.
2024-06-20 09:14:55 -07:00
Bobby R. Bruce
25d614e4ce tests: Fix x86_boot_exit_run.py 'set_max_ticks' typo (#1267) 2024-06-20 00:31:23 -07:00
Ivana Mitrovic
e88f0944e3 util: Bump urllib3 in gem5-resource-manager (#1257)
Bumps [urllib3](https://github.com/urllib3/urllib3) from 2.0.7 to 2.2.2.

Change-Id: I218236ff9ebe99839e417b67e740e6f98c0ee473
2024-06-18 11:05:13 -07:00
Bobby R. Bruce
9fe2bc9edc util-docker: Update devcontainer to use Ubuntu 24.04 (#1256)
Change-Id: I0e0dbaca2194c7f0ff5de54a49888da1c938c2de
2024-06-18 09:35:18 -07:00
Bobby R. Bruce
1a00ecfaf9 stdlib,configs,tests: Add gem5 MultiSim (MultiProcessing for gem5) (#1167)
This allows for multiple gem5 simulations to be spawned from a single
parent gem5 process, as defined in a simgle gem5 configuration. In this
design _all_ the `Simulator`s are defined in the simulation script and
then added to the mutlisim module. For example:

```py
from gem5.simulate.Simulator import Simulator
import gem5.utils.multisim as multisim

# Construct the board[0] and board[1] as you wish here...

simulator1 = Simulator(board=board[0], id="board-1")
simulator2 = Simulator(board=board[1], id="board-2")

multisim.add_simulator(simulator1)
multisim.add_simulator(simulator2)
```

This specifies that two simulations are to be run in parallel in
seperate threads: one specified by `simulator1` and another by
`simulator2`. They are then added to MultiSim via the
`multisim.add_simulator` function. The user can specify an id via the
Simulator constructor. This is used to give each process a unique id and
output directory name. Given this, the id should be a helpful name
describing the simulation being specified. If not specified one is
automatically given.

To run these simulators we use `<gem5 binary> -m gem5.utils.multisim
<script> -p <num_processes>`. Note: multisim is an executable module in
gem5. This is the same module we input into our scripts to add the
simulators. This is an intentionally modular encapsulated design. When
the module processes a script it will schedule multiple gem5 jobs and,
dependent on the number of processes specified, will create child gem5
processes to processes tjese jobs (jobs are just gem5 simulations in
this case). The `--processes` (`-p`) argument is optional and if not
specified the max number of processes which can be run concurrently will
be the number of available threads on the host system.

The id for each process is used to create a subdirectory inside the
`outputdor` (`m5out`) of that id name. E.g, in the example above the
ID's are `board-1` and `board-2`. Therefore the m5 out directory will
look as follows:

```sh
- m5out
    - board-1
        - stats.txt
        - config.ini
        - config.json
        - terminal.out
    - board-2
        - stats.txt
        - config.ini
        - config.json
        - terminal.out
```

Each simulations output is encapsulated inside the subdirectory of the
id name.

If the multisim configuation script is passed directly to gem5 (like a
traditional gem5 configuraiton script, i.e.: `<gem5 binary> <script>`),
the user may run a single simulation specified in that script by passing
its id as an argument. E.g. `<gem5 binary> <script> board-1` will run
the `board-1` simulation specified in `script`. If no argument is passed
an Exception is raised asking the user to either specify or use the
MultiSim module if multiprocessing is needed.

If the user desires a list of ids of the simulations specified in a
given MultiSim script, they can do so by passing the `--list` (`-l`)
parameter to the config script. I.e., `<gem5 binary> <script> --list`
will list all the IDs for all the simulations specified in`script`.

This change comes with two new example scripts found in
'configs/example/gem5_library/multsim" to demonstrate multisim in both
an SE and FS mode simulation. Tests have been added which run these
scripts as part of gem5' Daily suite of tests.

Notes
=====

* **Bug fixed**: The `NoCache` classic cache hierarchy has been modified
so the Xbar is no longet set with a `__func__` call. This interfered
with MultiProcessing as this structure is not serializable via Pickle.
This was quite bad design anyway so should be changed

* **Change**: `readfile_contents` parameter previously wrote its value
to a file called "readfile" in the output dorectory. This has been
changed to write to a file called "readfile_{hash}" with "{hash}" being
a hash of the `readfile_contents`. This ensures that, during multisim
running, this file is not overwritten by other processes.

* **Removal note**: This implementation supercedes the functionality
outlined in 'src/python/gem5/utils/multiprocessing'. As such, this code
has been removed.

Limitations/Things to Fix/Improve
=================================

* Though each Simulator process has its own output directory (a
subdirectory within m5out, with an ID set by the user unique to that
Simulator), the stdout and stderr are still output to the terminal, not
the output directory. This results in: 1. stdout and stderr data lost
and not recorded for these runs. 2. An incredibly noisy terminal output.
* Each process uses the same cached resources. While there are locks on
resources when downloading, each processes will hash the resources they
require to ensure they are valid. This is very inefficient in cases
where resources are common between processes (e.g., you may have 10
processes each using the same disk image with each processes hashing the
disk images independently to give the same result to validate the
resources).

Change-Id: Ief5a3b765070c622d1f0de53ebd545c85a3f0eee

---------

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Co-authored-by: Jason Lowe-Power <jason@lowepower.com>
2024-06-18 09:34:39 -07:00
Bobby R. Bruce
3138c8a8b1 gpu-compute,mem-ruby: Revert "Add RubyHitMiss flag for TCP and TCC cache" (#1254)
Reverts gem5/gem5#1226
2024-06-18 07:58:54 -07:00
Bobby R. Bruce
36f73f671d cpu,stdlib: Adding Spatter (#1136)
This PR adds source code for C++ implementation of SpatterGen as well as
SpatterKernel. SpatterGen uses a PyBindMethod to add kernels to the
backend code. This way the process of processing json files could be
offloaded to python. In addition it adds standard library components for
SpatterGenCore and SpatterGen. These two components follow the same
structure as AbstractCore and AbstractProcessor. In addition
spatter_kernel.py adds a definition for SpatterKernel in python to make
adding kernels to C++ easier. Also it adds utility functions for parsing
dictionaries read from json as well as partitioning traces for multicore
setups.
2024-06-17 15:28:45 -07:00