gpu-compute,mem-ruby: Revert "Add RubyHitMiss flag for TCP and TCC cache" (#1254)

Reverts gem5/gem5#1226
This commit is contained in:
Bobby R. Bruce
2024-06-18 07:58:54 -07:00
committed by GitHub
parent 36f73f671d
commit 3138c8a8b1
5 changed files with 31 additions and 49 deletions

View File

@@ -655,12 +655,10 @@ machine(MachineType:TCC, "TCC Cache")
action(p_profileMiss, "pm", desc="Profile cache miss") {
L2cache.profileDemandMiss();
DPRINTF(RubyHitMiss, "in TCC miss at %#lx\n", address);
}
action(p_profileHit, "ph", desc="Profile cache hit") {
L2cache.profileDemandHit();
DPRINTF(RubyHitMiss, "in TCC hit at %#lx\n", address);
}
action(t_allocateTBE, "t", desc="allocate TBE Entry") {

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@@ -379,7 +379,7 @@ machine(MachineType:TCP, "GPU TCP (L1 Data Cache)")
if (use_seq_not_coal) {
sequencer.readCallback(address, tmp, false, MachineType:L1Cache);
} else {
coalescer.readCallback(address, MachineType:L1Cache, tmp, false);
coalescer.readCallback(address, MachineType:L1Cache, tmp);
}
if(is_valid(cache_entry)) {
unset_cache_entry();
@@ -404,7 +404,7 @@ machine(MachineType:TCP, "GPU TCP (L1 Data Cache)")
if (use_seq_not_coal) {
sequencer.readCallback(address, cache_entry.DataBlk, false, MachineType:L1Cache);
} else {
coalescer.readCallback(address, MachineType:L1Cache, cache_entry.DataBlk, false);
coalescer.readCallback(address, MachineType:L1Cache, cache_entry.DataBlk);
}
} else {
enqueue(requestNetwork_out, CPURequestMsg, issue_latency) {
@@ -565,7 +565,7 @@ machine(MachineType:TCP, "GPU TCP (L1 Data Cache)")
if (use_seq_not_coal) {
sequencer.readCallback(address, cache_entry.DataBlk, true, MachineType:L1Cache);
} else {
coalescer.readCallback(address, MachineType:L1Cache, cache_entry.DataBlk, true);
coalescer.readCallback(address, MachineType:L1Cache, cache_entry.DataBlk);
}
}
@@ -574,7 +574,7 @@ machine(MachineType:TCP, "GPU TCP (L1 Data Cache)")
if (use_seq_not_coal) {
sequencer.readCallback(address, cache_entry.DataBlk, false, MachineType:L1Cache);
} else {
coalescer.readCallback(address, MachineType:L1Cache, cache_entry.DataBlk, false);
coalescer.readCallback(address, MachineType:L1Cache, cache_entry.DataBlk);
}
}
@@ -587,7 +587,7 @@ machine(MachineType:TCP, "GPU TCP (L1 Data Cache)")
if (use_seq_not_coal) {
sequencer.readCallback(address, tmp, false, MachineType:L1Cache);
} else {
coalescer.readCallback(address, MachineType:L1Cache, tmp, false);
coalescer.readCallback(address, MachineType:L1Cache, tmp);
}
}
}

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@@ -31,11 +31,11 @@
structure (GPUCoalescer, external = "yes") {
void readCallback(Addr, DataBlock);
void readCallback(Addr, MachineType, DataBlock, bool);
void readCallback(Addr, MachineType, DataBlock);
void readCallback(Addr, MachineType, DataBlock,
Cycles, Cycles, Cycles, bool);
Cycles, Cycles, Cycles);
void readCallback(Addr, MachineType, DataBlock,
Cycles, Cycles, Cycles, bool, bool);
Cycles, Cycles, Cycles, bool);
void writeCallback(Addr, DataBlock);
void writeCallback(Addr, MachineType, DataBlock);
void writeCallback(Addr, MachineType, DataBlock,
@@ -49,11 +49,11 @@ structure (GPUCoalescer, external = "yes") {
structure (VIPERCoalescer, external = "yes") {
void readCallback(Addr, DataBlock);
void readCallback(Addr, MachineType, DataBlock, bool);
void readCallback(Addr, MachineType, DataBlock);
void readCallback(Addr, MachineType, DataBlock,
Cycles, Cycles, Cycles, bool);
Cycles, Cycles, Cycles);
void readCallback(Addr, MachineType, DataBlock,
Cycles, Cycles, Cycles, bool, bool);
Cycles, Cycles, Cycles, bool);
void writeCallback(Addr, DataBlock);
void writeCallback(Addr, MachineType, DataBlock);
void writeCallback(Addr, MachineType, DataBlock,

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@@ -38,7 +38,6 @@
#include "debug/GPUCoalescer.hh"
#include "debug/MemoryAccess.hh"
#include "debug/ProtocolTrace.hh"
#include "debug/RubyHitMiss.hh"
#include "debug/RubyPort.hh"
#include "debug/RubyStats.hh"
#include "gpu-compute/shader.hh"
@@ -439,7 +438,7 @@ GPUCoalescer::writeCallback(Addr address,
auto crequest = coalescedTable.at(address).front();
hitCallback(crequest, mach, data, true, crequest->getIssueTime(),
forwardRequestTime, firstResponseTime, isRegion, false);
forwardRequestTime, firstResponseTime, isRegion);
// remove this crequest in coalescedTable
delete crequest;
@@ -486,16 +485,15 @@ GPUCoalescer::writeCompleteCallback(Addr address,
void
GPUCoalescer::readCallback(Addr address, DataBlock& data)
{
readCallback(address, MachineType_NULL, data, false);
readCallback(address, MachineType_NULL, data);
}
void
GPUCoalescer::readCallback(Addr address,
MachineType mach,
DataBlock& data,
bool externalHit)
DataBlock& data)
{
readCallback(address, mach, data, Cycles(0), Cycles(0), Cycles(0), externalHit);
readCallback(address, mach, data, Cycles(0), Cycles(0), Cycles(0));
}
void
@@ -504,13 +502,12 @@ GPUCoalescer::readCallback(Addr address,
DataBlock& data,
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime,
bool externalHit)
Cycles firstResponseTime)
{
readCallback(address, mach, data,
initialRequestTime, forwardRequestTime, firstResponseTime,
false, externalHit);
false);
}
void
@@ -520,8 +517,7 @@ GPUCoalescer::readCallback(Addr address,
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime,
bool isRegion,
bool externalHit)
bool isRegion)
{
assert(address == makeLineAddress(address));
assert(coalescedTable.count(address));
@@ -531,7 +527,7 @@ GPUCoalescer::readCallback(Addr address,
"readCallback received non-read type response\n");
hitCallback(crequest, mach, data, true, crequest->getIssueTime(),
forwardRequestTime, firstResponseTime, isRegion, externalHit);
forwardRequestTime, firstResponseTime, isRegion);
delete crequest;
coalescedTable.at(address).pop_front();
@@ -551,8 +547,7 @@ GPUCoalescer::hitCallback(CoalescedRequest* crequest,
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime,
bool isRegion,
bool externalHit)
bool isRegion)
{
PacketPtr pkt = crequest->getFirstPkt();
Addr request_address = pkt->getAddr();
@@ -563,10 +558,6 @@ GPUCoalescer::hitCallback(CoalescedRequest* crequest,
DPRINTF(GPUCoalescer, "Got hitCallback for 0x%X\n", request_line_address);
DPRINTF(RubyHitMiss, "GPU TCP Cache %s at %#x\n",
externalHit ? "hit" : "miss",
printAddress(request_address));
recordMissLatency(crequest, mach,
initialRequestTime,
forwardRequestTime,
@@ -965,7 +956,7 @@ GPUCoalescer::atomicCallback(Addr address,
"atomicCallback saw non-atomic type response\n");
hitCallback(crequest, mach, (DataBlock&)data, true,
crequest->getIssueTime(), Cycles(0), Cycles(0), false, false);
crequest->getIssueTime(), Cycles(0), Cycles(0), false);
delete crequest;
coalescedTable.at(address).pop_front();

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@@ -289,10 +289,16 @@ class GPUCoalescer : public RubyPort
void readCallback(Addr address, DataBlock& data);
void readCallback(Addr address,
MachineType mach,
DataBlock& data);
void readCallback(Addr address,
MachineType mach,
DataBlock& data,
bool externalHit = false);
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime);
void readCallback(Addr address,
MachineType mach,
@@ -300,16 +306,7 @@ class GPUCoalescer : public RubyPort
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime,
bool externalHit = false);
void readCallback(Addr address,
MachineType mach,
DataBlock& data,
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime,
bool isRegion,
bool externalHit = false);
bool isRegion);
/* atomics need their own callback because the data
might be const coming from SLICC */
@@ -395,17 +392,13 @@ class GPUCoalescer : public RubyPort
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime,
bool isRegion,
bool externalHit = false);
bool isRegion);
void recordMissLatency(CoalescedRequest* crequest,
MachineType mach,
Cycles initialRequestTime,
Cycles forwardRequestTime,
Cycles firstResponseTime,
bool success,
bool isRegion);
bool success, bool isRegion);
void completeHitCallback(std::vector<PacketPtr> & mylist);
virtual RubyRequestType getRequestType(PacketPtr pkt);