Commit Graph

1286 Commits

Author SHA1 Message Date
Gabe Black
0a2ba189d4 sim: Fix a faulty assumption in MemPool.
In the MemPool object, the idea of a limit of the pool (largest page)
and the total number of pages were conflated, as was the page number of
the next "free" page and the total number of pages allocated. Both of
those would only be equivalent if the memory pool starts at address
zero, which is not generally true and could be true for at most one pool
at a time even when it is occasionally true.

Instead, this change fixes up MemPool to keep tree values, a starting
page number, the page number of the next free page, and the total number
of pages in the pool, both allocated and unallocated.

With those three values, we can accurately report the number of
allocated pages (not just the number of pages of any kind below the next
free one), the total number of free pages, and the total number of pages
in general (not the largest numbered page in the pool).

The value serialized by the System class was adjusted so that it will
stay compatible with previous checkpoints. The value unserialized by the
system class is passed to the MemPool as a limit, which has not changed
and so doesn't need to be updated. It gets translated into the total
number of pages in the MemPool constructor.

Change-Id: I8268ef410b41bf757df9ee5585ec2f6b0d8499e1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50687
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-29 12:17:21 +00:00
Gabe Black
ede1ad4b8c arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
Turn the functions within it into virtual methods on the ISA classes.
Eliminate the implementation in MIPS, which was just copy pasted from
Alpha long ago. Fix some minor style issues in ARM. Remove templating.
Switch from using an "XC" type parameter to using the ThreadContext *
installed in all ISA classes.

The ARM version of these functions actually depend on the ExecContext
delaying writes to MiscRegs to work correctly. More insiduously than
that, they also depend on the conicidental ThreadContext like
availability of certain functions like contextId and getCpuPtr which
come from the class which happened to implement the type passed into XC.

To accomodate that, those functions need both a real ThreadContext, and
another object which is either an ExecContext or a ThreadContext
depending on how the method is called.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1053

Change-Id: I68f95f7283f831776ba76bc5481bfffd18211bc4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50087
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-28 19:56:01 +00:00
Daniel R. Carvalho
cbffe30e64 sim,tests: Add unit test for sim/serialize.hh
Add a unit test for sim/serialize.hh.

==Bugs==
arrayParamIn cannot parse strings with spaces. Since spaces
are used as delimiters, strings containing spaces are parsed
as multiple entries of the array. The test that checks for
this has been disabled.

==Unexpected Behavior==
Serialization has an unexpected behavior when returning to
previous scopes. For example,

  ...
  SCS scs(cpt, "S1")
  paramOut(cpt, "param1", integer1)
  {
    SCS scs_2(cpt, "S2")
    paramOut(cpt, "param2", integer2)
  }
  paramOut(cpt, "param3", integer3)

will generate the output:
  ...
  [S1]
    param1=1
  [S2]
    param2=2
    param3=3

But the user might expect:
  ...
  [S1]
    param1=1
  [S2]
    param2=2
  [S1]
    param3=3

==Incovenient Behavior==
arrayParamIn with a std::array parameter is slightly
incovenient, since the raw data pointer must be extracted.
It may be worth it to add a template specialization.

==Not Tested==
paramInImpl is not being directly tested because it should
not be used as an external API - paramIn and optParamIn
should be used instead.

arrayParamIn with an InsertIterator parameter is not being
directly tested because the other versions should be used
instead.

Change-Id: If0c8f045aa317790d5fcb32e48629b113b62efc5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41337
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 05:31:01 +00:00
Daniel R. Carvalho
df928b36f8 sim,tests: Add unit test for sim/serialize_handlers
Add a GTest for the functionality of sim/serialize_handlers.hh.

Change-Id: I1128c7adb12a3c7d091e26db13733ba45e1e61fe
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38776
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 05:31:01 +00:00
Austin Harris
f42ce27065 sim: Fix hang while terminating threads with fork
It is possible that gem5 is forked multiple times before the threads are
re-created, so don't wait for the barrier if the threads were already
terminated.

Change-Id: Ia04db2f3b1341c4d432178a37812fd882e148ec2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50710
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 15:08:15 +00:00
Gabe Black
bec16fbc31 misc: Move MemPool based calls to the SEWorkload.
These currently proxy to the System object, but this is one step towards
moving the MemPool-s out of the System and into the SEWorkload where
they really should have been from the start.

Change-Id: Id27e7b874c283abf07bd892c8467a9cc52e2fdff
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50342
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 02:05:32 +00:00
Gabe Black
9da405ce96 sim: Set up an SEWorkload pointer in the base Process class.
This will make it easier for the process object to access shared SE
level functionality and info.

Change-Id: I2cbddcabdf7264fde492b0566791d909ce2b10be
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50341
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 02:04:57 +00:00
Gabe Black
4d398302c4 sim: Make the page shift a member of the MemPool class.
Pass it in through the constructor, rather than have the MemPool call
into the System object every time it needs the page shift. This is
simpler, more efficient, and removes a dependency between the MemPool
class and the System class.

Change-Id: I059bcb0db249251b32bff1beba3eadfe306d9081
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50339
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 01:07:26 +00:00
Gabe Black
6d9cbb9d6e sim: Exclude the m5opRange from the system mempools by construction.
Don't look for the m5opRange in the memory pools when allocating memory
so that it can be skipped, just exclude it from the memory pools
entirely when they are set up. This removes a dependence between the
memory pools and the system class.

Change-Id: I0d88c1bc2f889f32b234073cff8988319fb36ea5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50338
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 00:58:24 +00:00
Gabe Black
e7bf4db7bd sim: Squash a long standing warning from pybind11.
The module_ constructor which takes a module name and an optional
docstring is deprecated. This change replaces it with the
create_extension_module call that it would result in, which gets rid of
the warning.

Change-Id: I700b4afcf1e5e2548af18e2eb2a7b1214c989807
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50587
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 23:17:46 +00:00
Andreas Sandberg
8c685469f1 sim: Fix fork for multithreaded simulations
It is currently not possible to call m5.fork when the simulator is
running in with multiple parallel event queues. The POSIX standard
have very weak guarantees when forking a process with multiple
threads. In order to use fork correctly, we need to ensure that all
helper threads servicing event queues have terminated before the fork
system call is invoked.

There are two ways this could be implemented: 1) Always terminate
helper threads when taking a global simulator exit event, or 2)
terminate helper threads just before fork is called from Python.

This change implements the second strategy since the KVM-based CPUs
currently assume that TIDs don't change unless there is a fork event.

Change-Id: I22feaecd49f7f81689b43185d63a8f14428bed63
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50408
Reviewed-by: Austin Harris <mail@austin-harris.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-09-19 17:32:59 +00:00
Gabe Black
99e01f900d sim: Eliminate the now unused System::getArch().
Change-Id: Ia36c9c3779719faba30105cd15f4495c8b6141c8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48711
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-09-05 05:29:47 +00:00
Gabe Black
1253c15ebe scons,python,sim: Eliminate a redundant member of EmbeddedPython.
The filename member was just a less specific version of the abspath
member, and can be replaced by it to simplify things a little.

Change-Id: I61b312f2c356045e03462159e3232ac717954669
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48365
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-05 04:22:26 +00:00
Bobby R. Bruce
1853d57dc3 misc: Revert "arch,cpu,mem,sim: Fold arch/locked_mem.hh..."
This reverts commit a3f85217ab,
https://gem5-review.googlesource.com/c/public/gem5/+/48384

The reason for reverting this commit is it causes the Nightly build to
timeout: https://www.mail-archive.com/gem5-dev@gem5.org/msg40344.html

The exact cause of this failure was a stalling with the O3 processor on
ARM. The simulation reaches the following error and repeats until
timeout:

```
build/ARM/arch/arm/isa.cc:2634: warn: context 0: 2136500000 consecutive store conditional failures
```

The "realview-o3-ARM-x86_64-opt" test can replicate this:

```
./main.py run -j8 --uid
SuiteUID:tests/gem5/fs/linux/arm/test.py:realview-o3-ARM-x86_64-opt
```

Change-Id: I9e9a20753c2a25c143e6a73f58716feb41861cde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49927
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-04 04:37:49 +00:00
Gabe Black
a3f85217ab arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
Turn the functions within it into virtual methods on the ISA classes.
Eliminate the implementation in MIPS, which was just copy pasted from
Alpha long ago. Fix some minor style issues in ARM. Remove templating.
Switch from using an "XC" type parameter to using the ThreadContext *
installed in all ISA classes.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1053

Change-Id: I19ee3a8fbe50a4d7907029c2dd2796d0e98e965f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48384
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 11:17:32 +00:00
Gabe Black
18fb295bcd sim: Explicitly specify the namespace of serialization helpers.
That makes them work when not calling from the gem5 namespace.

Change-Id: If238d837f91d2c1b8ca58c9c3e08aed8cb0af28a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49619
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-28 04:18:12 +00:00
Gabe Black
e606db79d0 sim: Remove some code for python versions less than 3.
We no longer support those versions of python.

Change-Id: I8f7312d8c252e4491525aa13c7d091467b96af6b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49411
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-08-21 00:56:07 +00:00
Gabe Black
e90cb8ab75 mem,sim: Replace the deprecated chatty_assert with gem5_assert.
The new gem5_assert macro now does the job of both regular asserts, and
chatty_assert, except that its condition must always be valid code. It
is still not evaluated if NDEBUG is set, though.

Change-Id: I7c9435311746b2e02fe7335bce6ba618bf9fd4eb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48607
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-08-21 00:54:54 +00:00
Gabe Black
91e24ba776 misc: Replace THE_ISA macro with IS_NULL_ISA.
Now all occurances of the THE_ISA macro which were being used to check
for anything other than the NULL_ISA have been eliminated. We still need
to be able to check whether the current ISA is the null ISA, but we
don't want to let any preprocessor checks back in which are based on
what the current ISA is.

This change removes the THE_ISA macro, and replaces it with IS_NULL_ISA
which evaluates to 1 if the ISA is null, and 0 if it isn't.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1060

Change-Id: Iec146b40d8cab846dae03e15191390f754f2b71b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48709
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-04 21:04:22 +00:00
Gabe Black
a9af2e8810 sim: Don't serialize a root.isa string in checkpoints.
We are moving away from having a single ISA in a simulation. That means
it will no longer make sense to have a single, particular ISA at the
root of the object hierarchy which applies to the entire simulation.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1056

Change-Id: If4d354ac423e7ab4d3efbc6544d4feea93f56ab3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48884
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-31 18:06:52 +00:00
Jason Lowe-Power
eb24bca44e Merge "misc: Merge branch 'release-staging-v21-1' into develop" into develop 2021-07-30 04:44:09 +00:00
Gabe Black
ea2bc1b63f sim,base: Deprecate the GEM5_DEPRECATED_ENUM_VAL attribute.
The deprecated attribute didn't work on versions of gcc older than 6,
but we now require version 7 or newer, so we don't need the macro any
more.

This change collapses the two uses of it in sim/aux_vector.hh, and marks
the macro as deprecated by extending the message string in the
underlying deprecated attribute.

Change-Id: I3bc9835ba19ad9534c7725e17a3558a749a94ca5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48514
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2021-07-29 10:17:51 +00:00
Gabe Black
00876fff20 misc: Replace the GEM5_VAR_USED macro with [[maybe_unused]].
The [[maybe_unused]] attribute is now standard, so we can use that
directly without hiding it behind a macro.

Change-Id: If24ffd7e50bdb503cb3e6ea61f226ea794e84b8f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48511
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-29 10:17:51 +00:00
Bobby R. Bruce
76ceda55f7 misc: Merge branch 'release-staging-v21-1' into develop
Change-Id: I0f69d3d0863f77c02ac8089fb4dccee3aa70a4ea
2021-07-28 17:37:04 -07:00
Gabe Black
b3b81196aa misc: Replace type_traits.hh XX::value with XX_v.
Now that we're using c++17, the type_traits with a ::value member have
a _v alias which reduces verbosity. Or on other words

std::is_integral<T>::value

can be replaced with

std::is_integral_v<T>

Make this substitution throughout the code base. In places where gem5
introduced it's own similar templates, add a V alias, spelled
differently to match gem5's internal style.

gem5: :IsVarArgs<T>::value => gem5::IsVarArgsV<T>
Change-Id: I1d84ffc4a236ad699471569e7916ec17fe5f109a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48604
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-28 01:48:03 +00:00
Kyle Roarty
906bb599d4 sim-se: Properly handle a clone with the VFORK flag
When clone is called with the VFORK flag, the calling process is
suspended until the child process either exits, or calls execve.

This patch adds in a new variable to Process, which is used to store the
context of the calling process if this process is created through a
clone with VFORK set.

This patch also adds the required support in clone to suspend the
calling thread, and in exitImpl and execveFunc to wake up the calling
thread when the child thread calls either of those functions

Change-Id: I85af67544ea1d5df7102dcff1331b5a6f6f4fa7c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48346
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-07-26 18:37:01 +00:00
Kyle Roarty
078dc689b9 sim-se: Fix execve syscall
There were three things preventing execve from working

Firstly, the entrypoint for the new program wasn't correct. This was
fixed by calling Process::init, which adds a bias to the entrypoint.

Secondly, the uname string wasn't being copied over. This meant when the
new executable tried to run, it would think the kernel was too old to
run on, and would error out. This was fixed by copying over the uname
string (the `release` string in Process) when creating the new process.

Additionally, this patch also ensures we copy over the uname string in
the clone implementation, as otherwise a cloned thread that called
execve would crash.

Finally, we choose to not delete the new ProcessParams or the old
Process. This is done both because it matches what is done in cloneFunc,
but also because deleting the old process results in a segfault later
on.

Change-Id: I4ca201da689e9e37671b4cb477dc76fa12eecf69
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48345
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-26 18:36:55 +00:00
Gabe Black
89529e6261 sim: Use the [[deprecated()]] attribute instead of GEM5_DEPRECATED.
The [[deprecated()]] attribute is now standard c++, so use that
directly.

Change-Id: I246551b05484a707ac9da05dc91af34d78aae1ff
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48507
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-24 21:57:04 +00:00
Gabe Black
83b14e569b misc: Stop using getVirtProxy.
The proxies are not used on the critical path, and it's usually implicit
whether they should be the FS or SE version.

Ideally in the future we won't need to worry about which version we need
to use, but the differences haven't quite been abstracted away, and
occasionally we need to decide between the two.

Change-Id: Idb363d6ddc681f7c1ad5e7aba69865f40aa30dc8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45907
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2021-07-23 03:42:17 +00:00
Gabe Black
b2067870e5 sim: Use a range based for loop in EmbeddedPython::initAll.
Change-Id: I380bed880735a411c6069079b4ae38a9d9080744
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48366
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-07-22 12:03:09 +00:00
Daniel R. Carvalho
79bab1dc5d mem: Adopt a memory namespace for memories
Encapsulate every class inheriting from Abstract or Physical
memories, and the memory controller in a memory namespace.

Change-Id: I228f7e55efc395089e3616ae0a0a6325867bd782
Issued-on: https://gem5.atlassian.net/browse/GEM5-983
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47309
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-07-09 11:24:10 +00:00
Daniel R. Carvalho
80b5f43d29 sim: Align coding style of probes
Fix coding style of probes for the following aspects:
- Long lines
- Return type of multi-line functions
- Name of local parameters

Also, added missing overrides

Jira: https://gem5.atlassian.net/browse/GEM5-857

Change-Id: Ibd905d1941fc203ca8308f7a3930d58515b19a97
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38697
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-07-08 11:58:25 +00:00
Richard Cooper
cd76334a2a sim-se: Fix for build error in MacOS.
On MacOS the build fails because the types of readfds, writefds, and
errorfds cannot be automatically converted to fd_set*. Added casts
similar to the ones used for the FD_ZERO calls to help the compiler.

Change-Id: I40a2268f7f2ca1bece1ecafda52dfddf2212364d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47759
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-08 08:48:08 +00:00
Daniel R. Carvalho
5ff1fac819 misc: Rename Debug namespace as debug
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

gem5::Debug became gem5::debug.

Change-Id: Ic04606baab3317d2e58ab3ca9b37fc201c406ee8
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47305
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-07 23:18:59 +00:00
Daniel R. Carvalho
4b2118ed4b misc: Remove sim/cur_tick dependency from sim/core.hh
Remove this unnecessary dependency. Fixed all incorrect
includes of sim/core.hh.

Change-Id: I3ae282dbaeb45fbf4630237a3ab9b1a593ffbe0c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43592
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-06 09:59:11 +00:00
Daniel R. Carvalho
974a47dfb9 misc: Adopt the gem5 namespace
Apply the gem5 namespace to the codebase.

Some anonymous namespaces could theoretically be removed,
but since this change's main goal was to keep conflicts
at a minimum, it was decided not to modify much the
general shape of the files.

A few missing comments of the form "// namespace X" that
occurred before the newly added "} // namespace gem5"
have been added for consistency.

std out should not be included in the gem5 namespace, so
they weren't.

ProtoMessage has not been included in the gem5 namespace,
since I'm not familiar with how proto works.

Regarding the SystemC files, although they belong to gem5,
they actually perform integration between gem5 and SystemC;
therefore, it deserved its own separate namespace.

Files that are automatically generated have been included
in the gem5 namespace.

The .isa files currently are limited to a single namespace.
This limitation should be later removed to make it easier
to accomodate a better API.

Regarding the files in util, gem5:: was prepended where
suitable. Notice that this patch was tested as much as
possible given that most of these were already not
previously compiling.

Change-Id: Ia53d404ec79c46edaa98f654e23bc3b0e179fe2d
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46323
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-01 19:08:24 +00:00
Kyle Roarty
bcd12f301d arch-x86,sim: Implement sched_getaffinity
sched_getaffinity is different from other syscalls in the raw syscall
return the size of the cpumask being used to represent the CPU bit mask.

Because of this, when a library (libnuma in this case) directly called
sched_getaffinity and got a return value of 0, it errored out, thinking
that there were no CPUs available.

This implementation assumes that all CPUs are available, so it sets
all simulated CPUs in the bitmask

Change-Id: Id95c919986cc98a411877056256604f57a29f0f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46243
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-06-30 16:47:43 +00:00
Tom Rollet
835607d497 sim: Add serialization for file descriptor array
Add serialization of the fd array when checkpointing in SE mode.
With this patch, host backed files are restored.
Further work needs to be done for restoring other types of
file descriptor.

As the file path saved is relative, on restoration of the checkpoint,
it may fail to open the file if the path is no longer valid.
If it cannot open the file, it will exit the simulation
with a meaningful error message.

Change-Id: I4d0c7cd614a8abaffcae9aba1a28c9fdbc023c5a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46619
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-29 07:06:05 +00:00
Daniel R. Carvalho
6be82cc3ae dev,sim: Fix compiler not finding specialized byte_swap
The specialized version of byte_swap cannot be found by
the compiler. As a temporary workaround to get the major
patch going, move the specialization to the base header
file.

Change-Id: I7d2bfc1c29b70042860ae06cdc043c0490cd8916
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46322
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-06-28 20:25:07 +00:00
Daniel R. Carvalho
a1a71a128d sim: Remove SimObject dependency from Drainable
Remove this circular dependency by casting to Named
instead of SimObject.

Change-Id: Ia064f7ab1a693586b6bd0045f431512ca3c78801
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43004
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2021-06-17 21:09:51 +00:00
Daniel R. Carvalho
a906e04cb7 sim: Make SimObject inherit from Named
Standardize name creation of sim objects.

Change-Id: I5e0cb828da0810b47217e96e302857e32083c50b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43246
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2021-06-17 21:09:51 +00:00
Daniel R. Carvalho
5f0e38bab0 sim: Add missing compiler include
Add missing base/compiler.hh include for the
namespace deprecation macro.

Change-Id: I43fad575fa538be2bef5296938b71ed8eded2ecf
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46919
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-17 13:45:35 +00:00
Daniel R. Carvalho
94d44ada63 sim: Add unit test for sim/port
Add a unit test for sim/port.

The fact that binding a port does not automatically
bind its peer is error-prone, and should likely be
revisited in the future.

Change-Id: Iee91fc9bfa80a527d9a1902529722833b061dec9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43003
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-06-16 10:50:26 +00:00
Daniel R. Carvalho
7f5bd15f51 base: Add unit test for base/trace.hh
Add an unit test for base/trace.hh.

Marked the source files needed for tracing with a 'gem5 trace'
tag.

Change-Id: Ib1e17de3c772146596a26a2ce5aa7a6310bf7938
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41336
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-06-16 10:50:26 +00:00
Daniel R. Carvalho
43f3c51bce sim: Make IniFile non-pointer in CheckpointIn
There is no need to use a pointer for this variable.

Change-Id: I784c94c8b775880def8339df63540357c2078c7b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38741
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2021-06-16 10:50:26 +00:00
Daniel R. Carvalho
05c0d52370 sim: Remove SimObject dependency from serialize.hh
Previously Serializable::serializeAll called SimObject::
serializeAll. This created an unnecessary dependency. This
change makes Serializable responsible for the generation
of the checkpoint file, and then the SimObjects will
perform the serialization of the object using that file.

With this change serialize.hh contains only functions
related to the (un)serialization of basic types or
objects that inherit from Serializable. As a general
rule, functions related to the (un)serialization of
specific/other types must be defined in the file that
introduces that type.

Change-Id: I9438b799d7e9d4c992a62c7f9d1f15f3f3250a5a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38740
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-06-16 10:50:26 +00:00
Daniel R. Carvalho
18de63cea0 sim: Remove (UN)SERIALIZE_OBJ_PTR
SimObjects keep a static list with all existing
SimObjects. This list is then used to serialize
all objects declared in the system. If these
macros were used then an object would be serialized
more than once, which is not a correct behavior.

Change-Id: Idc4433ec2a23a21ee5ee2b7cc2facfe3dd979859
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46720
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-06-16 10:50:26 +00:00
Daniel R. Carvalho
19c7429520 sim,util: Remove event dependencies from serialize.hh
With this change serialize.hh is no longer responsible
for the (un)serialization of events. As a general rule,
rules to (un)serialize non-basic types should be defined
at the file that introduces that type. Therefore,
(UN)SERIALIZE_EVENT have been moved to eventq.hh.

Globals has a single instance which must be serialized
and unserialized. Instead of having a stray global
variable handled by Serialization, we pass its management
to Root. As a side effect, Globals is assigned its own
files: sim/globals.(cc/hh).

Finally, 'unserializeGlobals()' is removed, so that
Root can fully handle Globals' serialization. This
breaks checkpoint compatibility, so a checkpoint
upgrader is added.

Change-Id: I9c8e57306f83f9cc30ab2b745a4972755191bec4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43586
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2021-06-16 10:50:26 +00:00
Matthew Poremba
c493d2c4ad sim,mem-ruby: Handle interleaved device memory
Device memories are used for PCI devices which have their own pools of
backing store memory such as amdgpu device. The check for an address
being in device memory previously did not handle multiple interleaved
memory devices with the same address range. Therefore, the device memory
check would fail if the interleaving masks did not match. This updates
the method to iterate through all device memories that handle the
RequestorID and returns true if any of the device memories contain the
packet address.

Change-Id: I9339d39c1cb54a5b9075c4a122c118fe61dc6fdb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46381
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-14 15:48:51 +00:00
Matthew Poremba
ca12a8997d mem-ruby,sim: Add support for VGA ROM memory region
Checks if the address is in a shadowed region, and sends the request
to pio to be serviced by the device backing up that range.

Based on: https://gem5-review.googlesource.com/c/amd/gem5/+/23484

Change-Id: I4d5b46cccd6203523008b2e9545d55eb62130964
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46159
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-11 17:10:32 +00:00