mem-cache: Fix circular dependency in QoS mem (#857)
This PR removes a circular dependency between `QoSMemSinkCtrl` and `QoSMemSinkInterface` that prevented the `controller()` function of `QoSMemSinkInterface` from being used by removing the default value for `QoSMemSinkCtrl.interface`. Change-Id: I4ecc39b974e239be1a2e9285e1f6f8ea873c018d
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@@ -1,4 +1,4 @@
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# Copyright (c) 2018-2020 ARM Limited
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# Copyright (c) 2018-2020,2024 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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@@ -36,7 +36,6 @@
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# Author: Matteo Andreozzi
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from m5.objects.QoSMemCtrl import *
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from m5.objects.QoSMemSinkInterface import *
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from m5.params import *
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@@ -46,9 +45,7 @@ class QoSMemSinkCtrl(QoSMemCtrl):
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cxx_class = "gem5::memory::qos::MemSinkCtrl"
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port = ResponsePort("Response ports")
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interface = Param.QoSMemSinkInterface(
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QoSMemSinkInterface(), "Interface to memory"
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)
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interface = Param.QoSMemSinkInterface("Interface to memory")
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# the basic configuration of the controller architecture, note
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# that each entry corresponds to a burst for the specific DRAM
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@@ -1,4 +1,4 @@
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# Copyright (c) 2020-2021 Arm Limited
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# Copyright (c) 2020-2021,2024 Arm Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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@@ -34,6 +34,7 @@
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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from m5.objects.AbstractMemory import AbstractMemory
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from m5.objects.QoSMemSinkCtrl import QoSMemSinkCtrl
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class QoSMemSinkInterface(AbstractMemory):
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