arch-riscv: Remove checked_type in StaticInst Constructor

We should not try to check vtype when decoding the instruction.
It should be checked in vset{i}vl{i} since the register can be
modified via vset{i}vl{i}

Change-Id: I403e5c4579bc5b8e6af10f93eac20c14662e4d2d

src/arch/riscv/insts/vector.hh

@@ -100,7 +100,7 @@ class VectorNonSplitInst : public RiscvStaticInst
                    OpClass __opClass)
         : RiscvStaticInst(mnem, _machInst, __opClass),
         vl(_machInst.vl),
-        vtype(checked_vtype(_machInst.vill, _machInst.vtype8))
+        vtype(_machInst.vtype8)
     {
         this->flags[IsVector] = true;
     }
@@ -118,7 +118,7 @@ class VectorMacroInst : public RiscvMacroInst
                    OpClass __opClass)
         : RiscvMacroInst(mnem, _machInst, __opClass),
         vl(_machInst.vl),
-        vtype(checked_vtype(_machInst.vill, _machInst.vtype8))
+        vtype(_machInst.vtype8)
     {
         this->flags[IsVector] = true;
     }