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arch-arm: Annotate CM flag in AA64 CM Instructions

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DC ZVA instruction is not classified as a cache maintenance instruction,
and therefore its execution cannot cause this field to be set to 1.

Change-Id: I0f30db1e6fc629dc52293edfb2bac4cf99ee49cc
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21306
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Giacomo Travaglini
2019-09-12 10:23:16 +01:00
parent acd148a76c
commit d9fee95b71
1 changed files with 14 additions and 4 deletions
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18
src/arch/arm/isa/insts/data64.isa
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@@ -410,6 +410,12 @@ let {{
exec_output += DCStore64InitiateAcc.subst(msrDCZVAIop);
exec_output += Store64CompleteAcc.subst(msrDCZVAIop);
# Cache maintenance fault annotation
# The DC ZVA instruction is not classified as a cache maintenance
# instruction, and therefore we shouldn't annotate it
cachem_fa = '''
fault->annotate(ArmFault::CM, 1);
'''
msrdccvau_ea_code = msr_check_code
msrdccvau_ea_code += '''
@@ -425,7 +431,8 @@ let {{
{ "ea_code" : msrdccvau_ea_code,
"memacc_code" : ';',
"use_uops" : 0,
"op_wb" : ";", "fa_code" : ";"},
"op_wb" : ";",
"fa_code" : cachem_fa},
['IsStore', 'IsMemRef']);
header_output += DCStore64Declare.subst(msrDCCVAUIop);
decoder_output += DCStore64Constructor.subst(msrDCCVAUIop);
@@ -448,7 +455,8 @@ let {{
{ "ea_code" : msrdccvac_ea_code,
"memacc_code" : ';',
"use_uops" : 0,
"op_wb" : ";", "fa_code" : ";"},
"op_wb" : ";",
"fa_code" : cachem_fa},
['IsStore', 'IsMemRef']);
header_output += DCStore64Declare.subst(msrDCCVACIop);
decoder_output += DCStore64Constructor.subst(msrDCCVACIop);
@@ -471,7 +479,8 @@ let {{
{ "ea_code" : msrdccivac_ea_code,
"memacc_code" : ';',
"use_uops" : 0,
"op_wb" : ";", "fa_code" : ";"},
"op_wb" : ";",
"fa_code" : cachem_fa},
['IsStore', 'IsMemRef']);
header_output += DCStore64Declare.subst(msrDCCIVACIop);
decoder_output += DCStore64Constructor.subst(msrDCCIVACIop);
@@ -500,7 +509,8 @@ let {{
{ "ea_code" : msrdcivac_ea_code,
"memacc_code" : ';',
"use_uops" : 0,
"op_wb" : ";", "fa_code" : ";"},
"op_wb" : ";",
"fa_code" : cachem_fa},
['IsStore', 'IsMemRef']);
header_output += DCStore64Declare.subst(msrDCIVACIop);
decoder_output += DCStore64Constructor.subst(msrDCIVACIop);