cpu: Stop treating VecElem as its own case in InstResult.

Since this is now a RegVal, we can treat it as a Scalar result.

Change-Id: I0afd7815c1ebf20b50ce27a00b27bb408d2a32ab
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49125
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/cpu/checker/cpu.hh

@@ -260,14 +260,6 @@ class CheckerCPU : public BaseCPU, public ExecContext
                                InstResult::ResultType::VecReg));
     }
 
-    template<typename T>
-    void
-    setVecElemResult(T&& t)
-    {
-        result.push(InstResult(std::forward<T>(t),
-                               InstResult::ResultType::VecElem));
-    }
-
     template<typename T>
     void
     setVecPredResult(T&& t)
@@ -319,7 +311,7 @@ class CheckerCPU : public BaseCPU, public ExecContext
         const RegId& reg = si->destRegIdx(idx);
         assert(reg.is(VecElemClass));
         thread->setVecElem(reg, val);
-        setVecElemResult(val);
+        setScalarResult(val);
     }
 
     void

src/cpu/checker/cpu_impl.hh

@@ -603,9 +603,8 @@ Checker<DynInstPtr>::copyResult(
             thread->setVecReg(idx, mismatch_val.asVector());
             break;
           case VecElemClass:
-            panic_if(!mismatch_val.isVecElem(),
-                     "Unexpected type of result");
-            thread->setVecElem(idx, mismatch_val.asVectorElem());
+            panic_if(!mismatch_val.isScalar(), "Unexpected type of result");
+            thread->setVecElem(idx, mismatch_val.asInteger());
             break;
           case CCRegClass:
             panic_if(!mismatch_val.isScalar(), "Unexpected type of result");
@@ -638,8 +637,8 @@ Checker<DynInstPtr>::copyResult(
             thread->setVecReg(idx, res.asVector());
             break;
           case VecElemClass:
-            panic_if(!res.isVecElem(), "Unexpected type of result");
-            thread->setVecElem(idx, res.asVectorElem());
+            panic_if(!res.isScalar(), "Unexpected type of result");
+            thread->setVecElem(idx, res.asInteger());
             break;
           case CCRegClass:
             panic_if(!res.isScalar(), "Unexpected type of result");

src/cpu/inst_res.hh

@@ -54,7 +54,6 @@ class InstResult
         RegVal integer;
         double dbl;
         TheISA::VecRegContainer vector;
-        RegVal vecElem;
         TheISA::VecPredRegContainer pred;
         MultiResult() {}
     };
@@ -62,7 +61,6 @@ class InstResult
     enum class ResultType
     {
         Scalar,
-        VecElem,
         VecReg,
         VecPredReg,
         NumResultTypes,
@@ -115,9 +113,6 @@ class InstResult
           case ResultType::Scalar:
             result.integer = that.result.integer;
             break;
-          case ResultType::VecElem:
-            result.vecElem = that.result.vecElem;
-            break;
           case ResultType::VecReg:
             result.vector = that.result.vector;
             break;
@@ -144,8 +139,6 @@ class InstResult
         switch (type) {
           case ResultType::Scalar:
             return result.integer == that.result.integer;
-          case ResultType::VecElem:
-            return result.vecElem == that.result.vecElem;
           case ResultType::VecReg:
             return result.vector == that.result.vector;
           case ResultType::VecPredReg:
@@ -169,8 +162,6 @@ class InstResult
     bool isScalar() const { return type == ResultType::Scalar; }
     /** Is this a vector result?. */
     bool isVector() const { return type == ResultType::VecReg; }
-    /** Is this a vector element result?. */
-    bool isVecElem() const { return type == ResultType::VecElem; }
     /** Is this a predicate result?. */
     bool isPred() const { return type == ResultType::VecPredReg; }
     /** Is this a valid result?. */
@@ -201,12 +192,6 @@ class InstResult
         panic_if(!isVector(), "Converting scalar (or invalid) to vector!!");
         return result.vector;
     }
-    const RegVal&
-    asVectorElem() const
-    {
-        panic_if(!isVecElem(), "Converting scalar (or invalid) to vector!!");
-        return result.vecElem;
-    }
 
     const TheISA::VecPredRegContainer&
     asPred() const

src/cpu/o3/dyn_inst.hh

@@ -793,17 +793,6 @@ class DynInst : public ExecContext, public RefCounted
         }
     }
 
-    /** Vector element result. */
-    template<typename T>
-    void
-    setVecElemResult(T &&t)
-    {
-        if (instFlags[RecordResult]) {
-            instResult.push(InstResult(std::forward<T>(t),
-                        InstResult::ResultType::VecElem));
-        }
-    }
-
     /** Predicate result. */
     template<typename T>
     void
@@ -1310,7 +1299,7 @@ class DynInst : public ExecContext, public RefCounted
     {
         int reg_idx = idx;
         this->cpu->setVecElem(this->regs.renamedDestIdx(reg_idx), val);
-        setVecElemResult(val);
+        setScalarResult(val);
     }
 
     void