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arch-arm: VSTTBR_EL2 doesn't contain a VMID field

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Change-Id: Ia6e14b509d7016020af9c85941e7b2d89dcdd359
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32637
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2020-08-11 21:10:01 +01:00
parent 1899320462
commit d3ec83ae3e
1 changed files with 1 additions and 3 deletions
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4
src/arch/arm/tlb.cc
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@@ -1422,9 +1422,7 @@ TLB::updateMiscReg(ThreadContext *tc, ArmTranslationType tranType)
scr = tc->readMiscReg(MISCREG_SCR_EL3);
isPriv = aarch64EL != EL0;
if (haveVirtualization) {
uint64_t vttbr = isSecure? tc->readMiscReg(MISCREG_VSTTBR_EL2):
tc->readMiscReg(MISCREG_VTTBR_EL2);
vmid = bits(vttbr, 55, 48);
vmid = bits(tc->readMiscReg(MISCREG_VTTBR_EL2), 55, 48);
isHyp = aarch64EL == EL2;
isHyp |= tranType & HypMode;
isHyp &= (tranType & S1S2NsTran) == 0;