arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.

The only thing still in arch/registers.hh were related to vector
registers. To make it obvious that nothing else should be added, this
change renames the file so that it has the much less generic name
arch/vecregs.hh.

Change-Id: I729697dc576e1978047688d9700dc07ff9b17044
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42686
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-02-24 02:16:20 -08:00
parent 35d8a9fd2f
commit d33a693e43
44 changed files with 36 additions and 57 deletions

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@@ -42,7 +42,7 @@
#ifndef __CPU_EXEC_CONTEXT_HH__
#define __CPU_EXEC_CONTEXT_HH__
#include "arch/registers.hh"
#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"

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@@ -34,7 +34,6 @@
#include <cerrno>
#include <memory>
#include "arch/registers.hh"
#include "arch/x86/cpuid.hh"
#include "arch/x86/faults.hh"
#include "arch/x86/interrupts.hh"

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@@ -41,7 +41,6 @@
#include <sstream>
#include "arch/isa.hh"
#include "arch/registers.hh"
#include "cpu/base.hh"
#include "cpu/minor/trace.hh"
#include "cpu/null_static_inst.hh"

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@@ -38,7 +38,6 @@
#include "cpu/minor/execute.hh"
#include "arch/locked_mem.hh"
#include "arch/registers.hh"
#include "cpu/minor/cpu.hh"
#include "cpu/minor/exec_context.hh"
#include "cpu/minor/fetch1.hh"

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@@ -37,7 +37,6 @@
#include "cpu/minor/scoreboard.hh"
#include "arch/registers.hh"
#include "cpu/reg_class.hh"
#include "debug/MinorScoreboard.hh"
#include "debug/MinorTiming.hh"

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@@ -45,7 +45,7 @@
#include <vector>
#include "arch/generic/isa.hh"
#include "arch/registers.hh"
#include "arch/vecregs.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
#include "cpu/o3/comm.hh"

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@@ -43,7 +43,7 @@
#include <vector>
#include "arch/registers.hh"
#include "arch/vecregs.hh"
#include "cpu/reg_class.hh"
#include "debug/Rename.hh"

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@@ -45,9 +45,7 @@
#include <utility>
#include <vector>
#include "arch/registers.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/o3/limits.hh"
#include "enums/SMTQueuePolicy.hh"

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@@ -42,7 +42,7 @@
#ifndef __CPU_O3_THREAD_CONTEXT_IMPL_HH__
#define __CPU_O3_THREAD_CONTEXT_IMPL_HH__
#include "arch/registers.hh"
#include "arch/vecregs.hh"
#include "config/the_isa.hh"
#include "cpu/o3/thread_context.hh"
#include "debug/O3CPU.hh"

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@@ -44,7 +44,7 @@
#include <cassert>
#include <cstddef>
#include "arch/registers.hh"
#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"

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@@ -41,7 +41,7 @@
#ifndef __CPU_SIMPLE_EXEC_CONTEXT_HH__
#define __CPU_SIMPLE_EXEC_CONTEXT_HH__
#include "arch/registers.hh"
#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"

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@@ -50,8 +50,8 @@
#include "arch/generic/mmu.hh"
#include "arch/generic/tlb.hh"
#include "arch/isa.hh"
#include "arch/registers.hh"
#include "arch/types.hh"
#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"

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@@ -47,8 +47,8 @@
#include "arch/generic/htm.hh"
#include "arch/generic/isa.hh"
#include "arch/registers.hh"
#include "arch/types.hh"
#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/pc_event.hh"

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@@ -44,7 +44,6 @@
#include <set>
#include <unordered_map>
#include "arch/registers.hh"
#include "base/statistics.hh"
#include "cpu/base.hh"
#include "debug/TraceCPUData.hh"