From d33a693e4316a474884f0b8a9a1cb4a67f8d173b Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 24 Feb 2021 02:16:20 -0800 Subject: [PATCH] arch,cpu: Rename arch/registers.hh to arch/vecregs.hh. The only thing still in arch/registers.hh were related to vector registers. To make it obvious that nothing else should be added, this change renames the file so that it has the much less generic name arch/vecregs.hh. Change-Id: I729697dc576e1978047688d9700dc07ff9b17044 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42686 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- src/arch/SConscript | 2 +- src/arch/arm/htm.hh | 2 +- src/arch/arm/insts/tme64ruby.cc | 1 - src/arch/arm/interrupts.hh | 1 - src/arch/arm/isa.hh | 2 +- src/arch/arm/isa_device.hh | 2 +- src/arch/arm/kvm/arm_cpu.cc | 3 ++- src/arch/arm/linux/se_workload.hh | 2 +- src/arch/arm/pmu.hh | 1 - src/arch/arm/remote_gdb.cc | 2 +- src/arch/arm/remote_gdb.hh | 2 +- src/arch/arm/tracers/tarmac_base.hh | 1 - src/arch/arm/tracers/tarmac_parser.hh | 1 - src/arch/arm/{registers.hh => vecregs.hh} | 4 ++-- src/arch/mips/{registers.hh => vecregs.hh} | 4 ++-- src/arch/null/{registers.hh => vecregs.hh} | 6 +++--- src/arch/power/{registers.hh => vecregs.hh} | 6 +++--- src/arch/riscv/{registers.hh => vecregs.hh} | 6 +++--- src/arch/sparc/{registers.hh => vecregs.hh} | 4 ++-- src/arch/x86/emulenv.hh | 1 - src/arch/x86/isa.cc | 1 - src/arch/x86/isa.hh | 1 - src/arch/x86/isa/includes.isa | 1 - src/arch/x86/linux/se_workload.cc | 1 - src/arch/x86/linux/syscalls.cc | 1 - src/arch/x86/pseudo_inst_abi.hh | 2 +- src/arch/x86/{registers.hh => vecregs.hh} | 6 +++--- src/cpu/exec_context.hh | 2 +- src/cpu/kvm/x86_cpu.cc | 1 - src/cpu/minor/dyn_inst.cc | 1 - src/cpu/minor/execute.cc | 1 - src/cpu/minor/scoreboard.cc | 1 - src/cpu/o3/regfile.hh | 2 +- src/cpu/o3/rename_map.cc | 2 +- src/cpu/o3/rob.hh | 2 -- src/cpu/o3/thread_context_impl.hh | 2 +- src/cpu/reg_class.hh | 2 +- src/cpu/simple/exec_context.hh | 2 +- src/cpu/simple_thread.hh | 2 +- src/cpu/thread_context.hh | 2 +- src/cpu/trace/trace_cpu.hh | 1 - src/dev/riscv/clint.hh | 1 - src/dev/riscv/plic.cc | 1 - src/sim/process.hh | 2 -- 44 files changed, 36 insertions(+), 57 deletions(-) rename src/arch/arm/{registers.hh => vecregs.hh} (97%) rename src/arch/mips/{registers.hh => vecregs.hh} (97%) rename src/arch/null/{registers.hh => vecregs.hh} (96%) rename src/arch/power/{registers.hh => vecregs.hh} (95%) rename src/arch/riscv/{registers.hh => vecregs.hh} (96%) rename src/arch/sparc/{registers.hh => vecregs.hh} (96%) rename src/arch/x86/{registers.hh => vecregs.hh} (97%) diff --git a/src/arch/SConscript b/src/arch/SConscript index 73c6afbf4d..f362f1c881 100644 --- a/src/arch/SConscript +++ b/src/arch/SConscript @@ -61,9 +61,9 @@ env.SwitchingHeaders( isa.hh locked_mem.hh page_size.hh - registers.hh remote_gdb.hh types.hh + vecregs.hh '''), env.subst('${TARGET_ISA}')) diff --git a/src/arch/arm/htm.hh b/src/arch/arm/htm.hh index 67576224e1..3f1f60e5ad 100644 --- a/src/arch/arm/htm.hh +++ b/src/arch/arm/htm.hh @@ -44,8 +44,8 @@ * ISA-specific types for hardware transactional memory. */ -#include "arch/arm/registers.hh" #include "arch/arm/regs/int.hh" +#include "arch/arm/regs/vec.hh" #include "arch/generic/htm.hh" #include "base/types.hh" diff --git a/src/arch/arm/insts/tme64ruby.cc b/src/arch/arm/insts/tme64ruby.cc index 5e22debe86..defc622839 100644 --- a/src/arch/arm/insts/tme64ruby.cc +++ b/src/arch/arm/insts/tme64ruby.cc @@ -39,7 +39,6 @@ #include "arch/arm/htm.hh" #include "arch/arm/insts/tme64.hh" #include "arch/arm/locked_mem.hh" -#include "arch/arm/registers.hh" #include "arch/generic/memhelpers.hh" #include "debug/ArmTme.hh" #include "mem/packet_access.hh" diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh index e60878da72..ead22d0048 100644 --- a/src/arch/arm/interrupts.hh +++ b/src/arch/arm/interrupts.hh @@ -42,7 +42,6 @@ #define __ARCH_ARM_INTERRUPT_HH__ #include "arch/arm/faults.hh" -#include "arch/arm/registers.hh" #include "arch/arm/regs/misc.hh" #include "arch/arm/utility.hh" #include "arch/generic/interrupts.hh" diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 197350aae6..bc773f5cfd 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -42,7 +42,7 @@ #define __ARCH_ARM_ISA_HH__ #include "arch/arm/isa_device.hh" -#include "arch/arm/registers.hh" +#include "arch/arm/regs/int.hh" #include "arch/arm/regs/misc.hh" #include "arch/arm/self_debug.hh" #include "arch/arm/system.hh" diff --git a/src/arch/arm/isa_device.hh b/src/arch/arm/isa_device.hh index 365b3e0376..63e6b8ea49 100644 --- a/src/arch/arm/isa_device.hh +++ b/src/arch/arm/isa_device.hh @@ -38,8 +38,8 @@ #ifndef __ARCH_ARM_ISA_DEVICE_HH__ #define __ARCH_ARM_ISA_DEVICE_HH__ -#include "arch/arm/registers.hh" #include "base/compiler.hh" +#include "base/types.hh" class ThreadContext; diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc index e827c2272f..31b2ee013b 100644 --- a/src/arch/arm/kvm/arm_cpu.cc +++ b/src/arch/arm/kvm/arm_cpu.cc @@ -44,7 +44,8 @@ #include #include "arch/arm/interrupts.hh" -#include "arch/arm/registers.hh" +#include "arch/arm/regs/int.hh" +#include "arch/arm/regs/misc.hh" #include "cpu/kvm/base.hh" #include "debug/Kvm.hh" #include "debug/KvmContext.hh" diff --git a/src/arch/arm/linux/se_workload.hh b/src/arch/arm/linux/se_workload.hh index 615666159f..1c68e20ae3 100644 --- a/src/arch/arm/linux/se_workload.hh +++ b/src/arch/arm/linux/se_workload.hh @@ -29,7 +29,7 @@ #define __ARCH_ARM_LINUX_SE_WORKLOAD_HH__ #include "arch/arm/linux/linux.hh" -#include "arch/arm/registers.hh" +#include "arch/arm/regs/int.hh" #include "arch/arm/se_workload.hh" #include "params/ArmEmuLinux.hh" #include "sim/syscall_desc.hh" diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh index 69c64b6b62..739fd0544b 100644 --- a/src/arch/arm/pmu.hh +++ b/src/arch/arm/pmu.hh @@ -43,7 +43,6 @@ #include #include "arch/arm/isa_device.hh" -#include "arch/arm/registers.hh" #include "arch/arm/system.hh" #include "base/cprintf.hh" #include "cpu/base.hh" diff --git a/src/arch/arm/remote_gdb.cc b/src/arch/arm/remote_gdb.cc index 96344a97d8..5a6720cb70 100644 --- a/src/arch/arm/remote_gdb.cc +++ b/src/arch/arm/remote_gdb.cc @@ -137,7 +137,7 @@ #include "arch/arm/decoder.hh" #include "arch/arm/pagetable.hh" -#include "arch/arm/registers.hh" +#include "arch/arm/regs/vec.hh" #include "arch/arm/system.hh" #include "arch/arm/utility.hh" #include "arch/generic/mmu.hh" diff --git a/src/arch/arm/remote_gdb.hh b/src/arch/arm/remote_gdb.hh index 112056a9ab..ce9cd695eb 100644 --- a/src/arch/arm/remote_gdb.hh +++ b/src/arch/arm/remote_gdb.hh @@ -46,7 +46,7 @@ #include -#include "arch/arm/registers.hh" +#include "arch/arm/regs/vec.hh" #include "arch/arm/utility.hh" #include "base/compiler.hh" #include "base/remote_gdb.hh" diff --git a/src/arch/arm/tracers/tarmac_base.hh b/src/arch/arm/tracers/tarmac_base.hh index 16100337ee..aaf909a35e 100644 --- a/src/arch/arm/tracers/tarmac_base.hh +++ b/src/arch/arm/tracers/tarmac_base.hh @@ -49,7 +49,6 @@ #ifndef __ARCH_ARM_TRACERS_TARMAC_BASE_HH__ #define __ARCH_ARM_TRACERS_TARMAC_BASE_HH__ -#include "arch/arm/registers.hh" #include "base/trace.hh" #include "base/types.hh" #include "cpu/static_inst.hh" diff --git a/src/arch/arm/tracers/tarmac_parser.hh b/src/arch/arm/tracers/tarmac_parser.hh index 3486cb2fa5..000a874576 100644 --- a/src/arch/arm/tracers/tarmac_parser.hh +++ b/src/arch/arm/tracers/tarmac_parser.hh @@ -49,7 +49,6 @@ #include #include -#include "arch/arm/registers.hh" #include "base/trace.hh" #include "base/types.hh" #include "cpu/static_inst.hh" diff --git a/src/arch/arm/registers.hh b/src/arch/arm/vecregs.hh similarity index 97% rename from src/arch/arm/registers.hh rename to src/arch/arm/vecregs.hh index 55ba1412f9..9f5621b5fc 100644 --- a/src/arch/arm/registers.hh +++ b/src/arch/arm/vecregs.hh @@ -38,8 +38,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_ARM_REGISTERS_HH__ -#define __ARCH_ARM_REGISTERS_HH__ +#ifndef __ARCH_ARM_VECREGS_HH__ +#define __ARCH_ARM_VECREGS_HH__ #include "arch/arm/regs/vec.hh" diff --git a/src/arch/mips/registers.hh b/src/arch/mips/vecregs.hh similarity index 97% rename from src/arch/mips/registers.hh rename to src/arch/mips/vecregs.hh index 7dbe30d09d..53baf6089e 100644 --- a/src/arch/mips/registers.hh +++ b/src/arch/mips/vecregs.hh @@ -27,8 +27,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_MIPS_REGISTERS_HH__ -#define __ARCH_MIPS_REGISTERS_HH__ +#ifndef __ARCH_MIPS_VECREGS_HH__ +#define __ARCH_MIPS_VECREGS_HH__ #include "arch/generic/vec_pred_reg.hh" #include "arch/generic/vec_reg.hh" diff --git a/src/arch/null/registers.hh b/src/arch/null/vecregs.hh similarity index 96% rename from src/arch/null/registers.hh rename to src/arch/null/vecregs.hh index b2332b5208..e56a4314cd 100644 --- a/src/arch/null/registers.hh +++ b/src/arch/null/vecregs.hh @@ -35,8 +35,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_NULL_REGISTERS_HH__ -#define __ARCH_NULL_REGISTERS_HH__ +#ifndef __ARCH_NULL_VECREGS_HH__ +#define __ARCH_NULL_VECREGS_HH__ #include "arch/generic/vec_pred_reg.hh" #include "arch/generic/vec_reg.hh" @@ -59,4 +59,4 @@ constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr; } -#endif // __ARCH_NULL_REGISTERS_HH__ +#endif // __ARCH_NULL_VECREGS_HH__ diff --git a/src/arch/power/registers.hh b/src/arch/power/vecregs.hh similarity index 95% rename from src/arch/power/registers.hh rename to src/arch/power/vecregs.hh index 07081eb45f..10f658c6a3 100644 --- a/src/arch/power/registers.hh +++ b/src/arch/power/vecregs.hh @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_POWER_REGISTERS_HH__ -#define __ARCH_POWER_REGISTERS_HH__ +#ifndef __ARCH_POWER_VECREGS_HH__ +#define __ARCH_POWER_VECREGS_HH__ #include @@ -52,4 +52,4 @@ constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr; } // namespace PowerISA -#endif // __ARCH_POWER_REGISTERS_HH__ +#endif // __ARCH_POWER_VECREGS_HH__ diff --git a/src/arch/riscv/registers.hh b/src/arch/riscv/vecregs.hh similarity index 96% rename from src/arch/riscv/registers.hh rename to src/arch/riscv/vecregs.hh index e4d648fca3..ab2b3cb7c2 100644 --- a/src/arch/riscv/registers.hh +++ b/src/arch/riscv/vecregs.hh @@ -43,8 +43,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_RISCV_REGISTERS_HH__ -#define __ARCH_RISCV_REGISTERS_HH__ +#ifndef __ARCH_RISCV_VECREGS_HH__ +#define __ARCH_RISCV_VECREGS_HH__ #include @@ -69,4 +69,4 @@ constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr; } -#endif // __ARCH_RISCV_REGISTERS_HH__ +#endif // __ARCH_RISCV_VECREGS_HH__ diff --git a/src/arch/sparc/registers.hh b/src/arch/sparc/vecregs.hh similarity index 96% rename from src/arch/sparc/registers.hh rename to src/arch/sparc/vecregs.hh index 9c676c536a..b5f73d4b89 100644 --- a/src/arch/sparc/registers.hh +++ b/src/arch/sparc/vecregs.hh @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_SPARC_REGISTERS_HH__ -#define __ARCH_SPARC_REGISTERS_HH__ +#ifndef __ARCH_SPARC_VECREGS_HH__ +#define __ARCH_SPARC_VECREGS_HH__ #include "arch/generic/vec_pred_reg.hh" #include "arch/generic/vec_reg.hh" diff --git a/src/arch/x86/emulenv.hh b/src/arch/x86/emulenv.hh index 1490326135..cc45cc84a7 100644 --- a/src/arch/x86/emulenv.hh +++ b/src/arch/x86/emulenv.hh @@ -40,7 +40,6 @@ #include "arch/x86/regs/int.hh" #include "arch/x86/regs/segment.hh" -#include "arch/x86/registers.hh" #include "arch/x86/types.hh" namespace X86ISA diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc index 849b77638a..69aff8cc70 100644 --- a/src/arch/x86/isa.cc +++ b/src/arch/x86/isa.cc @@ -30,7 +30,6 @@ #include "arch/x86/decoder.hh" #include "arch/x86/mmu.hh" -#include "arch/x86/registers.hh" #include "arch/x86/regs/ccr.hh" #include "arch/x86/regs/int.hh" #include "arch/x86/regs/misc.hh" diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh index 33bf873a00..6358d27014 100644 --- a/src/arch/x86/isa.hh +++ b/src/arch/x86/isa.hh @@ -33,7 +33,6 @@ #include #include "arch/generic/isa.hh" -#include "arch/x86/registers.hh" #include "arch/x86/regs/float.hh" #include "arch/x86/regs/misc.hh" #include "base/types.hh" diff --git a/src/arch/x86/isa/includes.isa b/src/arch/x86/isa/includes.isa index 300ffd4444..13f96876a7 100644 --- a/src/arch/x86/isa/includes.isa +++ b/src/arch/x86/isa/includes.isa @@ -60,7 +60,6 @@ output header {{ #include "arch/x86/insts/micromediaop.hh" #include "arch/x86/insts/microregop.hh" #include "arch/x86/insts/static_inst.hh" -#include "arch/x86/registers.hh" #include "arch/x86/types.hh" #include "arch/x86/utility.hh" #include "base/logging.hh" diff --git a/src/arch/x86/linux/se_workload.cc b/src/arch/x86/linux/se_workload.cc index 67b8184fca..f6f9d9aa2b 100644 --- a/src/arch/x86/linux/se_workload.cc +++ b/src/arch/x86/linux/se_workload.cc @@ -43,7 +43,6 @@ #include "arch/x86/linux/linux.hh" #include "arch/x86/page_size.hh" #include "arch/x86/process.hh" -#include "arch/x86/registers.hh" #include "arch/x86/se_workload.hh" #include "base/trace.hh" #include "cpu/thread_context.hh" diff --git a/src/arch/x86/linux/syscalls.cc b/src/arch/x86/linux/syscalls.cc index 2431f8767b..b64e4c70d8 100644 --- a/src/arch/x86/linux/syscalls.cc +++ b/src/arch/x86/linux/syscalls.cc @@ -29,7 +29,6 @@ #include "arch/x86/linux/linux.hh" #include "arch/x86/process.hh" -#include "arch/x86/registers.hh" #include "base/trace.hh" #include "cpu/thread_context.hh" #include "kern/linux/linux.hh" diff --git a/src/arch/x86/pseudo_inst_abi.hh b/src/arch/x86/pseudo_inst_abi.hh index 36e40db83d..04e84285c6 100644 --- a/src/arch/x86/pseudo_inst_abi.hh +++ b/src/arch/x86/pseudo_inst_abi.hh @@ -35,7 +35,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "arch/x86/registers.hh" +#include "arch/x86/regs/int.hh" #include "sim/guest_abi.hh" struct X86PseudoInstABI diff --git a/src/arch/x86/registers.hh b/src/arch/x86/vecregs.hh similarity index 97% rename from src/arch/x86/registers.hh rename to src/arch/x86/vecregs.hh index 6993b84647..f8c94ce3f2 100644 --- a/src/arch/x86/registers.hh +++ b/src/arch/x86/vecregs.hh @@ -36,8 +36,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_X86_REGISTERS_HH__ -#define __ARCH_X86_REGISTERS_HH__ +#ifndef __ARCH_X86_VECREGS_HH__ +#define __ARCH_X86_VECREGS_HH__ #include "arch/generic/vec_pred_reg.hh" #include "arch/generic/vec_reg.hh" @@ -76,4 +76,4 @@ constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr; } // namespace X86ISA -#endif // __ARCH_X86_REGFILE_HH__ +#endif // __ARCH_X86_VECREGS_HH__ diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh index 3c40f31621..e8164ecfaa 100644 --- a/src/cpu/exec_context.hh +++ b/src/cpu/exec_context.hh @@ -42,7 +42,7 @@ #ifndef __CPU_EXEC_CONTEXT_HH__ #define __CPU_EXEC_CONTEXT_HH__ -#include "arch/registers.hh" +#include "arch/vecregs.hh" #include "base/types.hh" #include "config/the_isa.hh" #include "cpu/base.hh" diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc index 320a241e64..df74460ef5 100644 --- a/src/cpu/kvm/x86_cpu.cc +++ b/src/cpu/kvm/x86_cpu.cc @@ -34,7 +34,6 @@ #include #include -#include "arch/registers.hh" #include "arch/x86/cpuid.hh" #include "arch/x86/faults.hh" #include "arch/x86/interrupts.hh" diff --git a/src/cpu/minor/dyn_inst.cc b/src/cpu/minor/dyn_inst.cc index b01755a34a..c0b5495513 100644 --- a/src/cpu/minor/dyn_inst.cc +++ b/src/cpu/minor/dyn_inst.cc @@ -41,7 +41,6 @@ #include #include "arch/isa.hh" -#include "arch/registers.hh" #include "cpu/base.hh" #include "cpu/minor/trace.hh" #include "cpu/null_static_inst.hh" diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index a85a2c3a5d..3b89e62966 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -38,7 +38,6 @@ #include "cpu/minor/execute.hh" #include "arch/locked_mem.hh" -#include "arch/registers.hh" #include "cpu/minor/cpu.hh" #include "cpu/minor/exec_context.hh" #include "cpu/minor/fetch1.hh" diff --git a/src/cpu/minor/scoreboard.cc b/src/cpu/minor/scoreboard.cc index 33b6b40baa..3cc1db798a 100644 --- a/src/cpu/minor/scoreboard.cc +++ b/src/cpu/minor/scoreboard.cc @@ -37,7 +37,6 @@ #include "cpu/minor/scoreboard.hh" -#include "arch/registers.hh" #include "cpu/reg_class.hh" #include "debug/MinorScoreboard.hh" #include "debug/MinorTiming.hh" diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index b67685f365..bdde7d69e6 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -45,7 +45,7 @@ #include #include "arch/generic/isa.hh" -#include "arch/registers.hh" +#include "arch/vecregs.hh" #include "base/trace.hh" #include "config/the_isa.hh" #include "cpu/o3/comm.hh" diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc index 8ec4862399..60de6ae666 100644 --- a/src/cpu/o3/rename_map.cc +++ b/src/cpu/o3/rename_map.cc @@ -43,7 +43,7 @@ #include -#include "arch/registers.hh" +#include "arch/vecregs.hh" #include "cpu/reg_class.hh" #include "debug/Rename.hh" diff --git a/src/cpu/o3/rob.hh b/src/cpu/o3/rob.hh index 97c2144e6c..6d972eb729 100644 --- a/src/cpu/o3/rob.hh +++ b/src/cpu/o3/rob.hh @@ -45,9 +45,7 @@ #include #include -#include "arch/registers.hh" #include "base/types.hh" -#include "config/the_isa.hh" #include "cpu/o3/limits.hh" #include "enums/SMTQueuePolicy.hh" diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index dd42a167fd..c3a6b52af0 100644 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -42,7 +42,7 @@ #ifndef __CPU_O3_THREAD_CONTEXT_IMPL_HH__ #define __CPU_O3_THREAD_CONTEXT_IMPL_HH__ -#include "arch/registers.hh" +#include "arch/vecregs.hh" #include "config/the_isa.hh" #include "cpu/o3/thread_context.hh" #include "debug/O3CPU.hh" diff --git a/src/cpu/reg_class.hh b/src/cpu/reg_class.hh index 3d3a7f70b1..9c4af45c66 100644 --- a/src/cpu/reg_class.hh +++ b/src/cpu/reg_class.hh @@ -44,7 +44,7 @@ #include #include -#include "arch/registers.hh" +#include "arch/vecregs.hh" #include "base/types.hh" #include "config/the_isa.hh" diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh index 218f3504e3..114ab906fa 100644 --- a/src/cpu/simple/exec_context.hh +++ b/src/cpu/simple/exec_context.hh @@ -41,7 +41,7 @@ #ifndef __CPU_SIMPLE_EXEC_CONTEXT_HH__ #define __CPU_SIMPLE_EXEC_CONTEXT_HH__ -#include "arch/registers.hh" +#include "arch/vecregs.hh" #include "base/types.hh" #include "config/the_isa.hh" #include "cpu/base.hh" diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 83820efc5e..88f1e6b7f9 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -50,8 +50,8 @@ #include "arch/generic/mmu.hh" #include "arch/generic/tlb.hh" #include "arch/isa.hh" -#include "arch/registers.hh" #include "arch/types.hh" +#include "arch/vecregs.hh" #include "base/types.hh" #include "config/the_isa.hh" #include "cpu/thread_context.hh" diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh index 75f6f5a3e9..145be587bc 100644 --- a/src/cpu/thread_context.hh +++ b/src/cpu/thread_context.hh @@ -47,8 +47,8 @@ #include "arch/generic/htm.hh" #include "arch/generic/isa.hh" -#include "arch/registers.hh" #include "arch/types.hh" +#include "arch/vecregs.hh" #include "base/types.hh" #include "config/the_isa.hh" #include "cpu/pc_event.hh" diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh index 790efaf5e2..f2c76782d6 100644 --- a/src/cpu/trace/trace_cpu.hh +++ b/src/cpu/trace/trace_cpu.hh @@ -44,7 +44,6 @@ #include #include -#include "arch/registers.hh" #include "base/statistics.hh" #include "cpu/base.hh" #include "debug/TraceCPUData.hh" diff --git a/src/dev/riscv/clint.hh b/src/dev/riscv/clint.hh index 2602928998..3d4234a31c 100644 --- a/src/dev/riscv/clint.hh +++ b/src/dev/riscv/clint.hh @@ -39,7 +39,6 @@ #define __DEV_RISCV_CLINT_HH__ #include "arch/riscv/interrupts.hh" -#include "arch/riscv/registers.hh" #include "dev/intpin.hh" #include "dev/io_device.hh" #include "dev/mc146818.hh" diff --git a/src/dev/riscv/plic.cc b/src/dev/riscv/plic.cc index f6f9239a7e..56a783899f 100644 --- a/src/dev/riscv/plic.cc +++ b/src/dev/riscv/plic.cc @@ -40,7 +40,6 @@ #include -#include "arch/riscv/registers.hh" #include "cpu/base.hh" #include "debug/Plic.hh" #include "mem/packet.hh" diff --git a/src/sim/process.hh b/src/sim/process.hh index c9e6a8b752..9dc5f22ff7 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -37,11 +37,9 @@ #include #include -#include "arch/registers.hh" #include "base/loader/memory_image.hh" #include "base/statistics.hh" #include "base/types.hh" -#include "config/the_isa.hh" #include "mem/se_translating_port_proxy.hh" #include "sim/fd_array.hh" #include "sim/fd_entry.hh"