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configs: Fix unconnected PCI port in SST gem5 config

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PCI Host was added to the HiFive platform here,
https://gem5-review.googlesource.com/c/public/gem5/+/59969

This change connects the PCI host to the membus. However,
it will not be added to the device tree.

Change-Id: I2c1b1049597e5bfd0be467ef2a514d70bc2dd83e
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60989
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Hoa Nguyen
2022-07-04 18:01:28 -07:00
parent 24daaf7828
commit d337af6818
1 changed files with 2 additions and 0 deletions
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2
configs/example/sst/riscv_fs.py
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@@ -93,6 +93,8 @@ def createHiFivePlatform(system):
system.platform = HiFive()
system.platform.pci_host.pio = system.membus.mem_side_ports
system.platform.rtc = RiscvRTC(frequency=Frequency("100MHz"))
system.platform.clint.int_pin = system.platform.rtc.int_pin