From d337af68188875a906501533f1b9fa0ca000bda5 Mon Sep 17 00:00:00 2001 From: Hoa Nguyen Date: Mon, 4 Jul 2022 18:01:28 -0700 Subject: [PATCH] configs: Fix unconnected PCI port in SST gem5 config PCI Host was added to the HiFive platform here, https://gem5-review.googlesource.com/c/public/gem5/+/59969 This change connects the PCI host to the membus. However, it will not be added to the device tree. Change-Id: I2c1b1049597e5bfd0be467ef2a514d70bc2dd83e Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60989 Reviewed-by: Jason Lowe-Power Tested-by: kokoro Maintainer: Jason Lowe-Power --- configs/example/sst/riscv_fs.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/example/sst/riscv_fs.py b/configs/example/sst/riscv_fs.py index bdbd061120..b5a6cc64b8 100644 --- a/configs/example/sst/riscv_fs.py +++ b/configs/example/sst/riscv_fs.py @@ -93,6 +93,8 @@ def createHiFivePlatform(system): system.platform = HiFive() + system.platform.pci_host.pio = system.membus.mem_side_ports + system.platform.rtc = RiscvRTC(frequency=Frequency("100MHz")) system.platform.clint.int_pin = system.platform.rtc.int_pin